Posted on April 03, 2006 at 13:47Hi,
In the STR71x Reference Manual, it says that the Vcm and Vref voltages can be out by up to 5%, and that the resulting errors can be calibrated out by software.
If I calibrate each chip once (at end of line test), what accuracy can I expect from the ADC? In other words, how much of the 5% error is due to variation between individual chips and how much is due to temperature variation, supply voltage and ageing?
Thanks
