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LIS2DH questions

oleg239955_st
Associate II

I have a project with LIS2DH accelerometer and I want to measure values each 20 seconds, turning LIS2DH off between measurements.

So, I tried to turn power on, wait 5ms, write 0x10 to CTRL_REG3 (turn on DRDY on INT1), then 0x1F to CTRL_REG1.

Then I wait for pulse in INT1 (and getting it almost immediately) and read data from OUT_X_L to OUT_Z_H. But - all data is zeroes. Writing registers in different direction, i.e. from REG1 to REG6 gives same result.

Datasheet for LIS2DH gives no information about how DRDY works (and, for example, which is minimum time allowed between two SPI reads/writes, but I read in datasheet for LIS2DH12 (newer accelerometer), that "In order to be sure to have the first DRDY rising edge synchronous with the selected ODR (avoid condition in Figure 2: "DRDY signal synchronization") set the I1_ ZYXDA bit to ‘1’ before enabling the ODR."

No luck.

Can you give me an advice how to read valid data from LIS2DH in a minimum time from powering it up?

Thank you in advance!

1 ACCEPTED SOLUTION

Accepted Solutions

Hi @oleg239955_st​ ,

glad to see you solved your first communication issue!

Let me try to answer to your next questions:

  1. Is there any possibility to find out that LIS2DH is ready except just waiting for 5ms after powering it on? --> You can launch an SPI reading of the WHO_AM_I (0Fh) register, just after the power on: if the returned 33h value, then the digital block is ready.
  2. Am I right that LIS2DH performs measurement just after it got ODR enabled as fast as it can, and ODR value is just a timer value between such measurements? I.e. in my case it is not so important which ODR is selected - first sample will be ready at same time after writing non-zero ODR? --> Even if in most cases the first read data is valid, I would suggested to always discard the first sample. You can mitigate this effect by writing the BDU bit in CTRL_REG4 (23h) register: this prevent the update of the output registers until MSB and LSB have been read.
  3. In some ICs I met that first measurement result can be not valid, what about LIS2DH? --> see above.
  4. Am I right that (5ms + conversion time + SPI read time) is minimum time to get values from LIS2DH after powering it up? --> ya, for a safe behavior (and if you want to consider valid also the first sample, I would say yes, it is.

If my reply answered your question, please click on Select as Best at the bottom of this post. This will help other users with the same issue to find the answer faster. 

-Eleon

View solution in original post

4 REPLIES 4
Eleon BORLINI
ST Employee

Hi @oleg239955_st​ ,

the timings you are using look ok.

Is the SPI pattern OK too?

Since I believe that also in polling mode you are receiving zero data, I would suggest you to add some more configuration as suggested in the C drivers on Github (lis2dh_read_data_polling.c), for example enabling the BDU bit.

  /* Enable Block Data Update. */
  lis2dh_block_data_update_set(&dev_ctx, PROPERTY_ENABLE);
  /* Set Output Data Rate to 1Hz. */
  lis2dh_data_rate_set(&dev_ctx, LIS2DH_ODR_1Hz);
  /* Set full scale to 2g. */
  lis2dh_full_scale_set(&dev_ctx, LIS2DH_2g);
  /* Enable temperature sensor. */
  lis2dh_temperature_meas_set(&dev_ctx, LIS2DH_TEMP_ENABLE);
  /* Set device in continuous mode with 12 bit resol. */
  lis2dh_operating_mode_set(&dev_ctx, LIS2DH_HR_12bit);

Try also polling the INT1_SRC (31h) IA bit to see whether the interrupt has been raised, and let me know.

-Eleon

Thank you for answering me!

This was my mistake :(

I have tested SPI exchange with logic analyzer and found it. As I using same SPI lines for accelerometer and transmitter, I found that there was extra pulse on clock line (while reconfiguring SPI inside MCU). So I missed that extra pulse, and found it only when I tuned analyzer to very high speed. I changed initialization procedure, and now I getting value from accelerometer.

But I still want to make measurement as fast as it can be possible, so I have several questions:

  1. Is there any possibility to find out that LIS2DH is ready except just waiting for 5ms after powering it on?
  2. Am I right that LIS2DH performs measurement just after it got ODR enabled as fast as it can, and ODR value is just a timer value between such measurements? I.e. in my case it is not so important which ODR is selected - first sample will be ready at same time after writing non-zero ODR?
  3. In some ICs I met that first measurement result can be not valid, what about LIS2DH?
  4. Am I right that (5ms + conversion time + SPI read time) is minimum time to get values from LIS2DH after powering it up?

Thank you!

Hi @oleg239955_st​ ,

glad to see you solved your first communication issue!

Let me try to answer to your next questions:

  1. Is there any possibility to find out that LIS2DH is ready except just waiting for 5ms after powering it on? --> You can launch an SPI reading of the WHO_AM_I (0Fh) register, just after the power on: if the returned 33h value, then the digital block is ready.
  2. Am I right that LIS2DH performs measurement just after it got ODR enabled as fast as it can, and ODR value is just a timer value between such measurements? I.e. in my case it is not so important which ODR is selected - first sample will be ready at same time after writing non-zero ODR? --> Even if in most cases the first read data is valid, I would suggested to always discard the first sample. You can mitigate this effect by writing the BDU bit in CTRL_REG4 (23h) register: this prevent the update of the output registers until MSB and LSB have been read.
  3. In some ICs I met that first measurement result can be not valid, what about LIS2DH? --> see above.
  4. Am I right that (5ms + conversion time + SPI read time) is minimum time to get values from LIS2DH after powering it up? --> ya, for a safe behavior (and if you want to consider valid also the first sample, I would say yes, it is.

If my reply answered your question, please click on Select as Best at the bottom of this post. This will help other users with the same issue to find the answer faster. 

-Eleon

Thank you!

But can you clarify something (I definitely mean that reading data from OUT registers should have place only when INT pin raised or ZYXDA flag in STATUS_REG is set).

  1. BDU (as you described and as shown in datasheet) - "prevent the update of the output registers until MSB and LSB have been read". But what does it exactly means? Read from accelerometer ADC and placed to registers? Or read from registers via SPI? I cannot understand how BDU flag can make first sample to be definitely valid..
  2. If I should read second sample, fastest way to get it (8 bit is enough for me) is set ODR as low-power 5376Hz (i.e. second sample will be available approximately 187uS after first sample), isn't it?

So, as I understand, to get fastest result available, I should power LIS2DH on, and immediately start reading WHO_AM_I via SPI until I will read 0x33. Then I should configure LIS2DH with ODR='1001b' (to get second result faster) and set BDU flag, and then start polling STATUS_REG until I will see ZYXDA flag set. Then I can get this sample (read all OUT registers) and this values will be valid? Or I should repeat last step (poll STATUS_REG then read OUT registers) again to get second value, and use that second value to sure that it is definitely valid?

Thanks!