Interrupts (INT1 and INT2) on custom ISPU code onLSM6DSO16IS

[cchen]

Hello,

I am programming my ISPU code that work on interrupts INT1 and INT2 in STM32CubeIDE and testing it in STEVAL-MIK109V3 with adapter board MKI229A (LSM6DSO16IS) and showing my output value in MEMS Studio.

I configured the conf.txt linking the interrupts NT1 to function "algo_00" and INT2 to function "algo_01".

conf.txt:

     acc_odr 104
     acc_fs 2
     acc_mode high_performance

     gyr_odr 104
     gyr_fs 500
     gyr_mode high_performance

     ispu_irq_rate 104
     ispu_int1 enable
     ispu_int2 enable
     ispu_latch disable

     algo 0 enable
     algo 1 enable
     algo_int1 0 enable
     algo_int2 1 enable

After building and uploading the ispu.ufc in the sensor with MEMS Studio happens that when INT2 is 0, it freezes all my custom ISPU Output data. And when INT2 is 1, it reads the ISPU Output data. The same does not happen with INT1.

In the main.c, in signal function "algo_00" has: 

          if(emit_int1 == 1){
            int_status = int_status | 0x1u;
         }

And in function "algo_01":

         if(emit_int2 == 1){
            int_status = int_status | 0x2u;
         }

I have not modified the function "int main(void)"

Is it correct my configuration to work with INT1 and INT2? could you give me some advices please?

Thank you very much

[Federica Bossi · Accepted solution]

Hi @cchen ,

The current implementation of STEVAL MKI109 firmware uses the INT2 pin as a trigger to read the ISPU_DOUT registers.
This is done to support the ISPU_SLEEP_INT2=1 configuration in INT2_CTRL register, which enables the monitoring of the ISPU execution state through the INT2 pin (please refer to the Application Note 5799 and the LSM6DSO16IS datasheet for a detailed description).

With this bit set, the INT2 pin is asserted to 1 when the ISPU core is in sleep state, and reset to 0 when the ISPU is running.
You can still route the algorithm user interrupt on the INT2 pin with the ISPU_SLEEP_INT2 bit set to 1, causing the INT2 pin to be the logic OR combinations of the two status events (ISPU sleep status, user algorithm interrupt).
The reading of the ISPU_INT_STATUS0_MAINPAGE, ISPU_INT_STATUS1_MAINPAGE, ISPU_INT_STATUS2_MAINPAGE, ISPU_INT_STATUS3_MAINPAGE registers is required to know whether the algorithm or the sleep status actually generated the interrupt in the latter case.
The following two options will produce the desired behavior on MEMS Studio:
  - add "ispu_sleep_int2 enable" to your conf.txt
  - set the ISPU_SLEEP_INT2 bit (bit 7) in INT2_CTRL register (0x0E) through MEMS Studio

Thanks for pointing this out to us, I will point this out to team working on it to consider improving the data management of ISPU_DOUT registers.

[cchen]

Hi @Federica Bossi,

Thank you very much for the detailed response, now I undertand better how to work with INT2