How to setup FIFO for LIS2HH12?

[falconcrew42]

I am using LIS2HH12 with Atmel ATSAM4E8C and am able to read registers and write to registers.

When I read FIFO_SRC register (0x2F) I get Bit EMPTY=1 and in STATUS register (0x27) ZYXDA is constantly 0. I am following the example from https://github.com/STMicroelectronics/STMems_Standard_C_drivers/blob/master/lis2hh12_STdC/example/read_data_simple.c and has tried to enable FIFO in CTRL3 register (0x22) and FIFO_CTRL register (0x2E), but still no data in FIFO.

Is there any setup steps I am missing?

[Eleon BORLINI]

Hi @Philip Jönsson​ , unfortunately there are no LIS2HH12 example related to the FIFO directly available on Github repository. So I suggest you to take inspiration from the Lis3dh examples for the multi-read FIFO, because the control registers of the FIFO in the two cases are the same. I also suggest you to compare your code with p.34 and sgg of the AN4662. Regards

void example_main_lis3dh_fifo(void)
{
  /*
   *  Initialize mems driver interface
   */
  stmdev_ctx_t dev_ctx;
 
  dev_ctx.write_reg = platform_write;
  dev_ctx.read_reg = platform_read;
  dev_ctx.handle = &hi2c1;
 
  /*
   * Initialize platform specific hardware
   */
  platform_init();
 
  /*
   *  Check device ID
   */
  lis3dh_device_id_get(&dev_ctx, &whoamI);
  if (whoamI != LIS3DH_ID)
  {
    while(1)
    {
      /* manage here device not found */
    }
  }
 
  /*
   *  Enable Block Data Update
   */
  lis3dh_block_data_update_set(&dev_ctx, PROPERTY_ENABLE);
 
  /*
   * Set Output Data Rate to 25 hz
   */
  lis3dh_data_rate_set(&dev_ctx, LIS3DH_ODR_25Hz);
 
  /*
   * Set full scale to 2 g
   */
  lis3dh_full_scale_set(&dev_ctx, LIS3DH_2g);
 
  /*
   * Set operating mode to high resolution
   */
  lis3dh_operating_mode_set(&dev_ctx, LIS3DH_HR_12bit);
 
  /*
   * Set FIFO watermark to 25 samples
   */
  lis3dh_fifo_watermark_set(&dev_ctx, 25);
 
  /*
   * Set FIFO mode to Stream mode: Accumulate samples and
   * override old data
   */
  lis3dh_fifo_mode_set(&dev_ctx, LIS3DH_DYNAMIC_STREAM_MODE);
 
  /*
   * Enable FIFO
   */
  lis3dh_fifo_set(&dev_ctx, PROPERTY_ENABLE);
 
  while(1)
  {
    uint8_t flags;
    uint8_t num = 0;
 
    /*
     * Check if FIFO level over threshold
     */
    lis3dh_fifo_fth_flag_get(&dev_ctx, &flags);
    if (flags)
    {
      /*
       * Read number of sample in FIFO
       */
      lis3dh_fifo_data_level_get(&dev_ctx, &num);
      while (num-- > 0)
      {
        /*
         * Read XL samples
         */
        lis3dh_acceleration_raw_get(&dev_ctx, data_raw_acceleration.u8bit);
        acceleration_mg[0] =
          lis3dh_from_fs2_hr_to_mg(data_raw_acceleration.i16bit[0]);
        acceleration_mg[1] =
          lis3dh_from_fs2_hr_to_mg(data_raw_acceleration.i16bit[1]);
        acceleration_mg[2] =
          lis3dh_from_fs2_hr_to_mg(data_raw_acceleration.i16bit[2]);
 
        sprintf((char*)tx_buffer, "Acceleration [mg]:%4.2f\t%4.2f\t%4.2f\r\n",
                acceleration_mg[0], acceleration_mg[1], acceleration_mg[2]);
                tx_com(tx_buffer, strlen((char const*)tx_buffer));
      }
    }
  }
}