2023-01-25 07:01 AM
2023-01-25 12:21 PM
Welcome, @EKOSE.1, to the community!
You are referring to AN2606, section 4.3, Hardware connection requirements, right?
In order not to interpret interspersed interference pulses as an apparent clock pulse to SCK during periods where SCK is floating, the connection line should be pulled low.
Does it answer your question?
Regards
/Peter
2023-01-25 12:21 PM
Welcome, @EKOSE.1, to the community!
You are referring to AN2606, section 4.3, Hardware connection requirements, right?
In order not to interpret interspersed interference pulses as an apparent clock pulse to SCK during periods where SCK is floating, the connection line should be pulled low.
Does it answer your question?
Regards
/Peter
2023-01-25 12:45 PM
Yes i reffered the AN2606. Thanks for your answer. You explained well.
2023-01-25 01:18 PM
Great!
If the problem is solved, please mark this thread as answered by selecting Select as best, as also explained here. This will help other users find that answer faster.
Regards
/Peter