STM32 MCUs

Dear Sir/Madam,We used the STM32F072C8T6 processor in a project we carried out for the railway sector, and as stated in the link below, we currently need a SIL certificate to be able to submit it to the auditing firm.Link: https://www.st.com/resource/en/product_presentation/stm32_stm8_functional-safety-packages.pdf

What I want to achieve:During startup all code is verified, starting with SMiRoT (as root-of-trust) then SMuRoT, then SecureManager then non-secure application.If the application has been modified (vberification fails) the startup shall end in system bootloader.Unfortunately, this does not work as our tampered/modified non-secure application is still started/executed instead of jumping into bootloader.Secure manager is installed with the provisioning script. We have modified the BOOT_UBE setting via TrustedPackageCreator from 0xB4 (OEM-iRoT - user flash) to 0xC3 (ST-iRoT - system flash) and re-generated Option_Bytes.csvWhat I see is that when connecting the STM32CubeProgrammer, the value for BOOT_UBE still shows 0xB4.And in the log during SFI flashing (provisioning.py -v --sfi-flash) it shows this:DEBUG - Warning: Option Byte: BOOT_UBE, value: 0xB4, was not modified.DEBUG - Warning: Option Bytes are unchanged, Data won't be downloadedDEBUG - Time elapsed during option Bytes config

Good day  I am currently trying to run the end_node sample located on the STM32Cube_FW_WL_V1.3.1 package.  I would like to know if i can have some guideline on how to use LmHandlerDeviceTimeReq().  Which class do i need to use?What lora server allows the time request?How do i check if the MAC request is even sending?  Should I see this on the Logs under my application located on the server?The request currently is not updating my system time.  The request is currently being done in a callback after a successful join. static void OnJoinRequest(LmHandlerJoinParams_t *joinParams){/* USER CODE BEGIN OnJoinRequest_1 */if (joinParams->Status == LORAMAC_HANDLER_SUCCESS){APP_LOG(TS_ON, VLEVEL_L, "JOINED\n"); // Send time requestif (LmHandlerDeviceTimeReq() == LORAMAC_HANDLER_SUCCESS){APP_LOG(TS_ON, VLEVEL_L, "DeviceTimeReq sent.\n");}}/* USER CODE END OnJoinRequest_1 */}After the request is sent successfully, the below lines are never r

Hello ST Community,I am working on an industrial combo vending machine controller system and would like to request a design review / best-practice feedback for an architecture based on STM32H563ZIT6.System OverviewMCU: STM32H563ZIT6 @ 200 MHzOperation: Industrial application, 24×7 continuous operationArchitecture:Main / Process ControllerStepper Motor ControllerDC Load ControllerEach controller uses a dedicated STM32 MCU to separate process logic, real-time motor control, and power load handling.1. Main Controller – CPU Load & Memory UtilizationMultiple interrupt sources (flow sensors, actuator pulses, PWM capture)UART RS485 communication @ 115200ADC usage with DMAContinuous vs process-based CPU load classificationWorst-case CPU utilization < 20% (**Please check our attached Doc)RAM usage ~4.4%, Flash usage ~4% (Build Analyzer)Question:From STM best-practice perspective, is this CPU and memory margin considered sufficient for long-term industrial operation?2. Stepper Controller

Hello, ADC_CR_ADCALLIN is described as "rw" . The procedure given in RM0456: 33.4.8 Extended calibration mode does not explicit recommend to reset ADC_CR_ADCALLIN after the procedure. I think it is helpfull to add in RM0456.  

Hello, I have a problem with setting readout protection in the STM32L496 device in software. The protection is set to "BB". After setting and power on reset, the microcontroller seems to not work (it looks like as if it was "stuck up"). I connected the ST-Link programmer and run STM32Cube programmer and it shows option byte RDP set correctly to BB value. Also, in the FAULT ANALYZER section it displays "CPU: LOCKUP". I don't know why it happens and how to solve it. The software code that sets the RDP protection is shown below:  __disable_irq(); while (FLASH->SR & FLASH_SR_BSY); FLASH->KEYR = 0x45670123; FLASH->KEYR = 0xCDEF89AB; FLASH->OPTKEYR = 0x08192A3B; FLASH->OPTKEYR = 0x4C5D6E7F; FLASH->OPTR = 0xFFEFF8BB; FLASH->CR |= FLASH_CR_OPTSTRT; while (FLASH->SR & FLASH_SR_BSY); FLASH->CR |= FLASH_CR_OBL_LAUNCH; 

My original aim was to prove to myself that I was able to measure execution time with cycle accuracy. In order to do that, I have 9 'test_dwt' functions, they all have same code except number of nop between 2 reads of DWT.That gives unexpected results because M55 has dual-issue capability, as people explained here. Nevertheless, I am puzzled with the result of test_dwt7 (7 nops). All clocks are at 100MHz, interrupts, icache and dcache are disabled, all 'test_dwt' functions starts with isb and dsb instructions.Here I print the result of 5 executions of each function. The execution order is 0 to 7c, repeated 5 times, saving results in an array. Then I print the results:test_dwt0 : 1 1 1 1 1 test_dwt1 : 1 1 1 1 1 test_dwt2 : 1 1 1 1 1 test_dwt3 : 2 2 2 2 2 test_dwt4 : 2 2 2 2 2 test_dwt5 : 3 3 3 3 3 test_dwt6 : 3 3 3 3 3 test_dwt7 : 27 27 27 27 27 test_dwt8 : 5 5 5 5 5 test_dwt7b : 4 4 4 4 4 test_dwt7c : 4 4 4 4 4the code of the 4 last functions:34180824 <test_dwt7&

I work on a pedometer project, which uses built-in accelerometer and an LCD screen (ILI9341). The screen code works fine, but I struggle to get the pedometer part to work. I suspect there might something wrong with how I initialized the accelerometer, since it outputs weird values.I use an stm32f407g-disc1 board with built-in accelerometer, which I communicate with via SPI. I find the values it returns very weird, since I don't move the device at the moment. Shouldn't they be close to zero since there is no acceleration? Moreover, they don't change when I shake the device slightly, although it may be because the acceleration is not big enough to be detected. Another problem is that mag value changes all the time, although x,y,z don't change.Valuesmain functionint main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. *

Split from this thread as the questions become more generic on embedded systems not related to the STM32. Hello Team, We are currently evaluating STM32H563ZI for a production system and would like your guidance on recommended CPU and RAM margin before moving to large-scale deployment. Based on our current firmware build analysis (STM32CubeIDE Build Analyzer): RAM: Total: 640 KB Used: ~182 KB (≈28.5%) Free: ~458 KB Flash: Total: 1 MB Used: ~282 KB (≈27.6%) Free: ~742 KB From a static memory usage perspective, sufficient margin is available. However, our application is load-dependent, and real CPU utilization varies based on field conditions and communication traffic. We would like clarification and guidance on the following points: What CPU utilization margin (%) is recommended for STM32H5 series devices in production systems (for example, acceptable average and peak CPU load)? What RAM headroom (free heap and stack margin) is considered safe for long-term and

Hi - does anyone have a solution for this?I have the latest CubeMX with STM32CubeWBA Firmware Package V1.8.0 / 29-October-2025 installed.The attached .ioc file is a minimum configuration for BLE. I am attempting to just get basic BLE advertising working as the first step on a new board.The build (using the auto-generated makefile) fails with "System/Config/LowPower/peripheral_init.c:24:10: fatal error: aes.h: No such file or directory". The AES is turned on in the .ioc file but the header file didn't get generated.  

Hello everyone, I'm having some trouble implementing I3C communication and would like to ask for some help.   I am using the NUCLEO-H503RB board as my main controller. For the target devices, I have the NUCLEO-IKS01A3 expansion board and the TSC1641 (Click Board) connected. I'm currently facing some issues with the I3C communication setup between these components.     I have successfully managed to read the WHO_AM_I ID from the LSM6DSO (on the NUCLEO-IKS01A3). However, when I attempt to read the ID from the TSC1641, the SCL line continues to output a clock signal (or stays toggling) without a proper response. I am seeking assistance in analyzing the root cause of this issue.    

Hello ST Community,I am working on an OTA firmware update implementation on STM32L496, and I am facing an issue related to dual-bank internal flash usage when the firmware size exceeds 512 KB.I would like to explain my setup and the problem in a simple and clear way. MCU and Flash DetailsMCU: STM32L496Internal Flash: 1 MBFlash configured in dual-bank modeBank1: 512 KBBank2: 512 KB What We Are DoingNormal ApplicationThe main application is stored in internal flashFirmware is built using STM32CubeIDENo OTA activity during normal operationOTA (Current / Tested)OTA is performed using NB-IoT and NFCFirmware is received in chunksChunks are written to flashCRC is verifiedAfter successful verification, firmware is switchedThis OTA flow works only when firmware size is less than 512 KB. Main Issue (Occurs Even Without OTA)When the firmware size increases beyond 512 KB (for example ~600 KB), the system starts misbehaving even if OTA is not started at all.Observed BehaviorUART logs

I want to make a pedometer app that would count steps and display the number of steps on an LCD screen. I have tested my functions for the screen (ILI9341 SPI), and they work successfully. I tested the LCD code by initializing a timer that incremented the value to display every second and sets the flag update_lcd_flag.But when I add the pedometer code, which uses SPI1, the value on the screen never gets updated past zero. Is it because I launch a DMA interrupt from the timer interrupt, or do I need to look for problems somehwere else, e.g. in my pedometer logic or SPI1 configuration? The pedometer relies on the accelometer, which is built into STM32F4O7G-DISC1, which is my board, by defaultP.S. The LCD functions don't use interrupts or DMA, they only use polling.The timer callbackvoid HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef* htim) { if (htim->Instance == TIM2) { if (draw_ready == 1) { HAL_GPIO_WritePin(ACC_GPIO_PORT, ACC_GPIO_PIN, GPIO_PIN_RESET); HAL_SPI_T

I am working with the NUCLEO-WB55RG, trying to get the filter accept list ("white list") feature working. Here is what I'm doing: - The NUCLEO is a peripheral implementing a custom BLE template, generated with STM32CubeMX 6.16.1. The "full" wireless stack V1.24.0 is installed on the M0+ core. - Start advertising with NO_WHITE_LIST_USE, connect, pair, and bond with a Central. This all works. Disconnect, call "aci_gap_add_devices_to_list()" (mode 0x03, also tried 0x05) with my bonded device list (retrieved with "aci_gap_get_bonded_devices()"). I have _also_ tried just called the "aci_gap_configure_whitelist()" command, the result is the same. - Then, if the # of bonded devices is > 0, when advertising restarts I use WHITE_LIST_FOR_ALL as the filter policy. In either case, I can connect and bond with two iOS devices. It seems that the white list isn't actually doing anything, and I can't figure out what to do. I followed the advice here, with no resul

I'm currently using Touchgfx after updating from version 4.25 to 4.26.When I build and run the code generated by Touchgfx 4.26, Display color doesn't match the design in Touchgfx 4.26.But When I do the same thing through Touchgfx 4.25, Display color matched very well. 

I am migrating from STM32L431 to STM32L471. After migration, the function relating to internal flash writing does not work any more. The problem is when I programmed internal flash with HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, address, data), following errors occurred, including FLASH_SR_PROGERR, FLASH_FLAG_PGAERR, and FLASH_FLAG_PGSERR.I searched on the web, and found problem may relate to timer initialization and watchdog usage. I added HAL_TIM_Base_DeInit before HAL_TIM_Base_Init, and watchdog is disabled completely in the system including wathdog initialization and update.. But the problem is still there.By the way, the development environment is MDK5.36, ARM::CMSIS IS 5.8.0 (5.6.0 is also tested), ARM::CMSIS-Driver is 2.6.1, Keil::STM32L4xx_DFP is 2.6.1.So, what the problem it might be, and how can I solve this problem?Thanks

Hello, I am planning out a project that uses new BLE 5.4 feature periodic advertising with response and I wanted to use STM32WBA as a broadcaster and STM32WB0s as observers. There seems to be a great software support for this on WB0 but when it comes to WBA I can't find much documentation or any examples even on periodic advertising. Do you plan to add this in the future? Or is STM3WBA more focused on audio and will not get these features? Thank you

 Hello,I am using an ST7701S LCD over 3-wire SPI (CS, SCK, SDA) with my STM32.When I send the initialization commands from my ESP, I noticed the following:The first command of the sequence is not sent.The program seems to stop at the second stage, around the 100th command.SPI is configured in master mode, polling (no DMA, no interrupts).Example of the write function:void ST7701_Write(uint8_t dc, uint8_t data) { uint16_t value = ((dc & 0x01) << 8) | data; HAL_GPIO_WritePin(LCD_CS_GPIO_Port, LCD_CS_Pin, GPIO_PIN_RESET); HAL_SPI_Transmit(&hspi2, (uint8_t *)&value, 1, HAL_MAX_DELAY); HAL_GPIO_WritePin(LCD_CS_GPIO_Port, LCD_CS_Pin, GPIO_PIN_SET); }Questions:Could the first command being skipped be due to HAL/SPI initialization or state?What is the recommended method to ensure all commands are reliably sent over 3-wire SPI to ST7701S?Thank you for your help.

Hello Everyone,I hope this message finds you well. I am currently developing a USB Host application using the STM32H573I-DK and have encountered a persistent Hard Fault issue that I would like to seek your expertise on.[Environment Information]Target: STM32H573I-DKExample: USBPD_SRC_UX_Host_MSC Stack: Azure RTOS (ThreadX, USBX)[Detailed Symptom]A hard fault occurs during initialization or while driving the process thread (msc_process_thread_entry) when connecting a USB MSC device. Debugging revealed abnormal memory access occurring during execution of the _ux_utility_memory_copy function.[Inquiry]When implementing USBX Host in this example and the STM32H5 environment, we seek broad advice on potential causes that could trigger memory copy and access errors.Example Stability: Are there any known issues or patch histories related to USBX memory management or stack configuration in the currently deployed USBPD_SRC_UX_Host_MSC example?H5 Architecture Characteristics: Are there scenari

I'm using stm32u535 and would like to have zero crossing detection of supply voltage. I've requirement of 6ADC channels and all are configured in differential mode and adc clock is 25Mhz and resolution is 14 bit and dma circular mode is enabled. On channel 6 i e enabled analog watchdog and written logic in isr to toggle GPIO. I proved gpio and I see deviation. Can someone help here. Here is my code snippet:ADC and AWDG initialization: hadc1.Instance = ADC1; hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; hadc1.Init.Resolution = ADC_RESOLUTION_14B; hadc1.Init.GainCompensation = 0; hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV; hadc1.Init.LowPowerAutoWait = DISABLE; hadc1.Init.ContinuousConvMode = ENABLE; hadc1.Init.NbrOfConversion = 8; hadc1.Init.DiscontinuousConvMode = DISABLE; hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_N

Hi STM Devs!I would like to introduce a thread scheduling library - SuperTinyKernel (STK).Its GitHub repo: https://github.com/dmitrykos/stkYou can check capabilities in detail on GitHub but briefly STK can:Soft and hard real-time support: STK supports cooperative scheduling for “soft real-time” tasks, you can also enable hard real-time mode (KERNEL_HRT) for periodic tasks with guaranteed deadlines.Static and dynamic tasks: Define all tasks at startup (KERNEL_STATIC) or allow tasks to be created and destroyed at runtime (KERNEL_DYNAMIC).Low-power friendliness: STK puts MCU into a low-power mode when there are no runnable tasks (task calls Sleep).Tiny footprint: Minimal C++ abstractions (no STL, no heavy namespaces) keep the kernel small and simple.Portability: Supports ARM Cortex-M and RISC-V RV32 MCUs.Multi-core support: Fully implemented for Cortex-M and RISC-V.x86 development mode: Compile & debug your code on a PC before flashing to the MCU, which helps with early

the best I achieve so far using DWT as well as PMU is 'few cycles' accuracy. My question is, how I measure execution time such that I get 1 cycle difference when I insert a nop in the measured code ? (assuming interrupts and caches are disabled).Both functions below return 1!.global test_pmu0 .type test_pmu0, %function .align 2 test_pmu0: isb sy dsb sy ldr r3, .test_pmu0.pmu_base ldr r0, [r3, #0x7C] //read PMU->CCNTR ldr r1, [r3, #0x7C] //read PMU->CCNTR sub r0,r1,r0 bx lr .align 2 .test_pmu0.pmu_base: .word 0xE0003000 //PMU base address .global test_pmu1 .type test_pmu1, %function .align 2 test_pmu1: isb sy dsb sy ldr r3, .test_pmu1.pmu_base ldr r0, [r3, #0x7C] //read PMU->CCNTR nop ldr r1, [r3, #0x7C] //read PMU->CCNTR sub r0,r1,r0 bx lr .align 2 .test_pmu1.pmu_base: .word 0xE0003000 //PMU base address 

I try to enable the PCROP Feature on a STM32H753I am using the STM32CubeProgrammer and connect via ST-Link V2After connecting, I go to the "OB" page and set the PROT_AREA_END1 value to 0xFFF and activate the DMEP1Then I press the "Apply" button and this happens in the log:Option byte command : -ob PROT_AREA_END1=0xFFF PROGRAMMING OPTION BYTES AREA ... Bank : 0x00 Address : 0x5200201c Size : 308 Bytes UPLOADING OPTION BYTES DATA ... Bank : 0x00 Address : 0x5200201c Size : 308 Bytes OPTION BYTE PROGRAMMING VERIFICATION: Error: Expected value for Option Byte "PROT_AREA_END1": 0xFFF, found: 0x0 Error: Option Byte Programming failedAnd then, I always get the error Message "Option Byte Programming failed"The RDP has level 0, but the same error occures, if I try to set RDP to level 1 at the same time.In the documentation I found no hint, that there is any other prerequisite must be met to set the PCROP.Has anyone an idea what the problem could be?(In generally the chip works, I can eras

I have a custom PCB with an STM32H563VGT6 microcontroller and an external Winbond W25Q16JVUXIQ NOR flash memory connected to the octoSPI's (XSPI) upper four pins. The problem is I can only write data to the flash memory after an erase, if I reset my board between the two operation. Everything the erasing, writing, indirect reading, memory mapped reading work on their own, but not after erase without reset. I read out all 3 status registers, they are the same before and after the chip erase. (Of course I set the write enable bit before trying to write into the memory) Any idea what could be the problem?

I want to design a baord with stm32h7b0zbt6 with extranal sdram chip W9825G6KH-6. I get PG15 with FMC_SDNCAS alt func in datasheet as below:But when I looked the PG15 alt func config I get as below info, I could not found an alternate function number for FMC_SDNCAS here ?? why they are not consistent ?