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STM32H7xx - ST-LinkV2 Cache Coherency Issue when debugging from Keil uVision5

Ernest Lotter
Associate II

Background:

Was debugging on STM32H7xx when I noticed that a variable that was passed by address to a function did not correctly display the value it was updated to. Where it is used 2 lines down the variable evaluates correctly (the code functions as expected).

Some specific details of the configuration:

  • STM32H743BITx
  • Data cache ENABLED
  • Variable located in AXI SRAM (D3)
  • Optimization level -O0 (lowest optimization level)
  • Debugging over SWD interface
  • Keil uVision 5 (MDK ARM Essential V5.28.0.0
  • ST-Link/V2 with firmware V2.J37.S7, STMicroelectronics Windows Driver V2.1.0.0 signed: STMICROELECTRONICS (GRENOBLE 2) SAS

Investigation:

  • Globally disabling cache solves the problem (but this is not an actual option)
  • Locally cleaning caches by address for for specific variable immediately correctly updates variable in watch/memory windows (this implies debugger is reading directly from SRAM (AXI in my case))
  • STM Document "STM32H7-System-Debug" confirms debug acts as bus master with memory access via both (1) the processor core (AHB-AP0 load/store) and the AHB bus matrix which includes the AXI SRAM (D3) among other things.
  • For some reason the debugger command act directly on the AXI SRAM and not via the processor core which will actually consider the cache state.
  • After further searching came across similar report with strong theory of the problem: https://electronics.stackexchange.com/questions/552477/debugging-cortex-m7-with-data-cache
  • So this behavior is related to ARM CoreSight (light) AHB-AP status word register (CSW) option HPROT[4:0] - "Reset value: non-secure, non-exclusive, noncacheable, non-bufferable, data access, privileged = b00011". This must be set changed to cacheable as per this GDB implementation: stm32h7x.cfg

See: https://developer.arm.com/documentation/ddi0314/h/debug-access-port/ahb-ap/programmers-model-overview?lang=en

Solutions attempted:

  • Tried to upgrade my STLink/V2 firmware to V2J37S7. This on its own did not solve the problem.
  • Tried to find bugfix for STLink/V2 firmware that references the problem without success

Any help and suggestions would be appreciated. Please consider that I do not have much flexibility around IDE, debugger.

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