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SPI slave 1 bit shift after power on

Saredo
Associate III

Hi, I'm working with a STM32F446ZET6. In this case, I configured my SPI as slave, and I use the HAL_SPI_TransmitReceive function.

The problem is that when the slave shoud respond with the value 0x11, I receive 0x22 on the master side.

I have checked the send value with a logic analizer and it shows that the slave is sending 0x22 (not 0x11). But this only happens when the programm starts from power on.

When I reset manually (NRST button on STM) the board I don't have this problem. It only happends from power on.

I have no idea of what the issue is.

Thanks in advance for the help.

1 ACCEPTED SOLUTION

Accepted Solutions

hello

Seems like some transient pulse during power on in clock line is tranlsated as slave clock input after slave initialization and "listening"

A workaround for this case is to enable slave SPI after the master device is powered and initialized.

Note that CPOL and CPHA (polarity and phase) of clock signal must be the same on both devices.

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5 REPLIES 5
Uwe Bonnes
Principal III

Probably during powerup/reset/start the SCK lines toggles unwanted. Perhaps proper external pull up/down can help. Consider also that HAL may cause the unwanted clock.

hello

Seems like some transient pulse during power on in clock line is tranlsated as slave clock input after slave initialization and "listening"

A workaround for this case is to enable slave SPI after the master device is powered and initialized.

Note that CPOL and CPHA (polarity and phase) of clock signal must be the same on both devices.

Saredo
Associate III

Thank you your answers.

Yes, I have checked the spi mode (CPOL and CPHA) is the same on both master and slave.

And i Have pull-up on the clock and CS signal.

It works from power on when I delay the SPI slave initialization. Thanks

Saredo
Associate III

But as I'm able to detect this error, is it possible to reset the SPI so as to not have this shift?

Yes SPI may be reset from RCC_APBxRSTR register , (SPIxRST) bit but

needs initialization again.