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Did anyone successfully interfaced WM8960 codec with STM32MP1 ?

Shree
Associate II

Hi,

I want to interface WM8960 with STM32MP1 using I2S interface. I initialized the WM8960 driver and added the DT entry in device tree file but the drivers fails.

Can you please share some pointers on how to interface audio codec with I2S to STM32MP1 ?

Regards,

Shree

3 REPLIES 3
mleo
Senior II
Shree
Associate II

Hi @mleo​ ,

I will share the log later.

Below modifications I have done in device tree:

/* Pin configuration Modified for Waveshare Audio Codec */
i2s1_pins_a: i2s1-0 {
pins {
pinmux = <STM32_PINMUX('Z', 2, AF5)>, /* I2S2_SDO */
<STM32_PINMUX('Z', 3, AF5)>, /* I2S2_WS */
<STM32_PINMUX('Z', 0, AF5)>, /* I2S2_CK */
<STM32_PINMUX('Z', 1, AF5)>, /* I2S2_SDI */
<STM32_PINMUX('Z', 6, AF5)>; /* I2S2_MCK */
slew-rate = <1>;
drive-push-pull;
bias-disable;
   };
};
 
i2s1_pins_sleep_a: i2s1-1 {
pins {
pinmux = <STM32_PINMUX('Z', 2, AF5)>, /* I2S2_SDO */
<STM32_PINMUX('Z', 3, AF5)>, /* I2S2_WS */
<STM32_PINMUX('Z', 0, AF5)>, /* I2S2_CK */
<STM32_PINMUX('Z', 1, AF5)>, /* I2S2_SDI */
<STM32_PINMUX('Z', 6, AF5)>; /* I2S2_MCK */
      };
};
 
&i2c4 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c4_pins_a>;
pinctrl-1 = <&i2c4_pins_sleep_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
 
// Device tree node for Audio Codec
codec: wm8960@1a { 
compatible = "wlf,wm8960";
reg = <0x1a>;
clocks = <&rcc SPI2_K>;
clock-names = "mclk";
wlf,shared-lrclk;
 
codec_port: port@0 {
codec_endpoint: endpoint {
remote-endpoint = <&i2s1_endpoint>;
};
};
 
&i2s1 {
clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
clock-names = "pclk", "i2sclk", "x8k", "x11k";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2s1_pins_a>;
pinctrl-1 = <&i2s1_pins_sleep_a>;
status = "okay";
 
i2s1_port: port {
i2s1_endpoint: endpoint {
remote-endpoint = <&codec_endpoint>;
format = "i2s";
mclk-fs = <256>;
};
};
};
 
sound {
        compatible = "audio-graph-card";
        label = "STM32MP1-DK";
        routing =
                "Playback" , "MCLK",
                "Capture" , "MCLK",
                "MICL" , "Mic Bias";
        dais = <&i2s1_port>;
        status = "okay";
    };

Ara.1
Senior

here is the failure log

 2.877712] mmcblk1boot0: mmc1:0001 IB2916 partition 1 4.00 MiB

[   2.878759] sound/soc/codecs/sgtl5000.c 1408

[   2.883675] mmcblk1boot1: mmc1:0001 IB2916 partition 2 4.00 MiB

[   2.886663] sound/soc/codecs/sgtl5000.c 1413

[   2.896978] mmcblk1rpmb: mmc1:0001 IB2916 partition 3 4.00 MiB, chardev (245:0)

[   2.897100] sgtl5000 0-000a: Linked as a consumer to regulator.9

[   2.910474] sgtl5000 0-000a: Linked as a consumer to regulator.8

[   2.916258] sound/soc/codecs/sgtl5000.c 1420

[   2.920640] sound/soc/codecs/sgtl5000.c 1428

[   2.924662] sound/soc/codecs/sgtl5000.c 1445

[   2.929002] sound/soc/codecs/sgtl5000.c 1455

[   2.934199] sound/soc/codecs/sgtl5000.c 1458

[   2.937691] sgtl5000 0-000a: Error reading chip id -6

[   2.942567] sound/soc/codecs/sgtl5000.c 1583 disable_clk

[   2.948017] sound/soc/codecs/sgtl5000.c 1587 disable_regs

[   2.953408] sgtl5000 0-000a: Dropping the link to regulator.9

[   2.959297] sgtl5000 0-000a: Dropping the link to regulator.8

[   2.968079] sound/soc/stm/stm32_i2s.c stm32_i2s_parse_dt::1031

[   2.972551] sound/soc/stm/stm32_i2s.c stm32_i2s_parse_dt::1036

[   2.978512] sound/soc/stm/stm32_i2s.c stm32_i2s_parse_dt::1050

[   2.984322] sound/soc/stm/stm32_i2s.c stm32_i2s_parse_dt::1084

[   2.984504] mmcblk1: p1 p2 p3 p4 p5

[   2.990099] sound/soc/stm/stm32_i2s.c stm32_i2s_parse_dt::1088

[   2.999706] st,stm32-i2s 44004000.audio-controller: Register master clock spi2_mclk

[   2.999976] sound/soc/stm/stm32_i2s.c stm32_i2s_parse_dt::1092 register mclk 0

[   3.007035] sound/soc/stm/stm32_i2s.c stm32_i2s_parse_dt::1121-------success

[   3.013937] st,stm32-i2s 44004000.audio-controller: No cache defaults, reading back from HW

[   3.023720] NET: Registered protocol family 17

[   3.026820] can: controller area network core (rev 20170425 abi 9)

[   3.033046] NET: Registered protocol family 29

[   3.037458] can: raw protocol (rev 20170425)

[   3.041648] can: broadcast manager protocol (rev 20170425 t)

[   3.047384] can: netlink gateway (rev 20170425) max_hops=1