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CTRL_REG1 configuration timing

JBald
Associate

I was trying to debug a driver written by another developer and I noticed they setup CTRL_REG1 through CTRL_REG6 with a 5ms delay between each register write. I asked the developer the reason for the delays and they said that if the registers were written with no delay sometimes the LIS2DH would just ignore some of the writes but if delays were inserted everything went fine. I scoured the web for LIS2DH driver examples and most of the drivers I found wrote all the registers sequentially with no delay (only 1 driver I found used a 1ms delay). Has anyone noticed an issue like this before? I did notice one thing in the driver I'm working with that diffs from some of the other drivers I found. In the driver I'm working with, CTRL_REG1 is written first and the ODR bits are set to the desired frequency before any of the other registers are configured! This seems pretty odd because the ODR bits start the accelerometer, right? So shouldn't everything be configured and the the ODR bits set last to start the accelerometer? Maybe this has something to do with the delay required in my driver?

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