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STM32F4 Interrupt Delay Issue

hslwlim
Associate
Posted on January 24, 2013 at 08:03

Hello,

I have been working with STM32F4 Discovery for a while. I haven't had any trouble before but I found some problems that I want to know why it happens. Currently, I'm trying to use external interrupt at 125kHz but I tried to use it at 2MHz. After calculation, if I run the processor at 160MHz, I found out that it should be able to handle 2MHz. 

However, what I actually saw was little delay on interrupt. Due to this delay, the interrupt didn't work as I expected and I even wonder whether my program will be even able to run smoothly or not. It only has basic code and the code is pretty same as example code which has nothing else than interrupt and GPIO.

I'm trying to use interrupt at rising edge so my code involves

EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; 

I wrote a simple code that when there is rising edge, detect it and just toggle the other pin.

and the below is what I see through the logic analyzer.

Is anyone can tell me why there is such a delay when it triggers interrupt?

0690X00000605UZQAY.png

I thought interrupt service routine might take some time so I even modified it so it directly write or read through the register like:

void EXTI1_IRQHandler( void )

{

if((EXTI->PR & EXTI_Line1)&&(EXTI->IMR & EXTI_Line1) != (uint32_t)RESET)

{

/* Clear the EXTI line 5 pending bit */

EXTI->PR = EXTI_Line1;

GPIOA->ODR ^= GPIO_Pin_2;

}

}

Does anyone knows how to fix the issue? 

#stm32f4 #delay #exti
1 REPLY 1
Posted on January 24, 2013 at 14:02

So what's the latency? ~750ns seems on the high side.

Have you looked at the assembler code generated, are you using optimization? Cost out the instructions and see if you can account for the latency.

Accesses to the APB/AHB are going to be relatively slow, the flash line has a ~35ns access time. Doing a RMW on the ODR isn't going to be very efficient, consider writing to BSRR

What happens if you toggle the pin as you enter the IRQ? I'd be tempted to use a write to BSRR on entry, and exit
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