Product forums

Hi!I think there is some display issues with STM32CubeMX with the cr_ker_ltdc If I look in the clock summary, I csn see that the ck_ker_ltdc is set to 100 MHz."ck_flexgen_27 0 0 0 100000000 0 0 0 Y deviceless no_connection_id             ck_ker_ltdc 0 0 0 100000000 0 0 50000 N 48010000.display-controller lcd                                                                                                                                    48000000.dsi px_clk                                                                                                                                 deviceless no_connection_id                clk_pix_ltdc 0 0 0 100000000 0 0 50000 Y 48010000.display-controller ref                                                                                                                                       deviceless no_connection_id         "In this case, I need to increase the cr_pix_ltdc to above 148.5 MHz to achieve full HD at the HDMI output.But in the CubeMX,

Hello dear customers, We understand that many of you are experiencing difficulties integrating the STM32 extension into the DevContainer environment. Specifically, the extension is not functioning correctly due to a dependency issue message displayed in VSCode. This problem arises from an extension installation issue within VSCode. Issue and fix When installing an extension and creating a DevContainer the extension is not automatically installed /imported to the DevContainerTo add the needed extensions, you need to click on the cloud icon and select the extensions to be added to the DevContainer.   Second issue after clicking on this icon, the install process on the DevContainer is not stable, sometimes you may need to relaunch the process twice or three times to have all your extensions installed. Third issue after adding all the needed extensions to the DevContainer, you may not be able to use them as VSCode is prioritizing the local installed one, so you must disable the lo

Hello,Has anyone seen ACTCLF permanently stuck at 0 on STM32N6 despite a confirmed HS clock at the input?I have had issues with this for some time and need a little help. Pehraps the following questions could be enligtning.Are there SNPS D-PHY initialization or calibration steps for the clock lane beyond what HAL_DCMIPP_CSI_SetConfig performs? Clock-lane equivalents of the 0xe2–0xe4 DDL registers? Can ST confirm the CSI kernel clock (IC18) is the D-PHY cfg_clk, and its required range? The CCFR encoding caps at ~33 MHz and the DK example uses 20 MHz, but we couldn't find this constraint stated in RM0486. Is PTSR being permanently 0 expected on this silicon? Is there any way to verify test-interface writes landed? What exactly are the conditions for ACTCLF to assert? Does the RX require observing a complete LP-11 to LP-01 to LP-00 entry sequence after PEN, and is there a known failure mode if the LP levels at the pad are degraded (e.g., loaded by an external common-mode filter) while HS

Hello,(ST-LINK + CubeProgrammer UART/USB both failing)I am using a NUCLEO-N657X0-Q board. I cannot flashing my code via the ST-Link ( ST-Link windows driver is installed and detected through device manager and I had already updated the stlink). it throws this error:STMicroelectronics ST-LINK GDB server. Version 7.11.0Copyright (c) 2025, STMicroelectronics. All rights reserved. Starting server with the following options:Persistent Mode : DisabledLogging Level : 1Listen Port Number : 61234Status Refresh Delay : 15sVerbose Mode : DisabledSWD Debug : EnabledInitWhile : Enabled Target unknown error 32 Error in initializing ST-LINK device.Reason: Unknown. Please check power and cabling to target.Then tried with CubeProgrammer to connect via STlink but it connects then quickly drops , here is the log :17:22:24 : STM32CubeProgrammer API v2.20.0 | Windows-64Bits17:22:39 : UR connection mode is defined with the HWrst reset mode17:22:40 : UR connection mode is defined with the HWrs

Hello, We’re trying to program a STM32WBA23KE controller using SPI. We use the same function for STM32WB10 over SPI and it works.We’ve connected the SPI bootloader pins PA0/PA5/PB8/PB9 according to AN2606, where it mentions these are the pins used for QFN32 packages.We’ve also replaced an older part with an old date code to date code 620 because of the bootloader issue mentioned in the errata (should have been fixed since date code 614).We also have the PH3-BOOT0 pin connected and the NRESET. Still, we can’t get the bootloader to respond to the SPI sync command. What are we missing?

I create one project for STM32F401 DMA-TIM4_PWM, so far first DMA work, but it didn’t go to handle routing.After debug with Copilot help, find after DMA finish(set DMA_S0CR bit 0 to 1), the ISPR0 bit 11 set to 1, (it related with DMA1-s0.) but code didn’t jump to the vector in 0x6C (DMA1-so interrupt handle).If add one line force ISR0 bit 11 to 1, (NVIC->ISPR[0] = (1 << 11);),  IABR0 bit 11 set to 1. jump to handle routing.Why manual set work, use DMA_S0CR bit 0 to 1 doesn’t work (it same set  ISR0 bit 11 to 1 as manual.)?

Hello,I designed a custom 4-layer PCB using STM32WB55CGU6. After assembly, ST-LINK cannot detect the MCU.ST-LINK connection:- SWDIO connected to MCU SWDIO pin- SWCLK connected to MCU SWCLK pin- GND connected- Target VCC connected- ST-LINK reports target voltage around 3.25 V- Error message:  "Unable to get core ID"  "No STM32 target found"Main symptoms:1. The board has 3.25 V on the 3V3 rail.2. ST-LINK cannot connect to the MCU.3. PA10 is configured as GPIO output high to drive LED1, but PA10 voltage is only about 2.18 V.   - R8 MCU side: 2.18 V   - R8 LED side: 2.15 V4. The same firmware works on another known-good board.5. I replaced the STM32WB55CGU6 with a known-good chip, but the issue remains.   The removed chip still works on another board, so the MCU itself does not seem damaged.6. Current consumption comparison:   - Known-good board: about 23 mA   - Problem board: about 9.2 mA   - Known-good board while holding RESET: about 12 mA   - Problem board while holding RESET: about 3

i am using stm32h753zi and stmcubeide is 1.10.1 .the eth dx and rx is 30000000 and 30000200 and heap is 30044000 and rcc- bypass and used tim6  .i did it like the examples and i got no out and finally got a working code from claude, but it works only untill the power line is connected after i remove and reconnect it stopped working or works for one ping and stops .i thought may be it was beacause i used ramd2 and used ramd1 it also stops working when this stops.someone pls help me fix this i am willing to start from scratch lwip i used static ip address and pc is in same subnet/* USER CODE BEGIN Header *//** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2026 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICEN

HelloAs I am trying to connect the STM32N6570-DK board on the STM32CubeProgrammer, initially the STM32CubeProgrammer recognises my device as in the following picture: When I press Connect on the STM32CubeProgrammer I get awarning: Connection to device 0x486 is lostas in the following picture: and then an error that says Data read failas in the following picture: I am using a MacBook Air M3, 2024, but even on windows (running on a virtual machine) I get the same error on the STM32CubeProgrammer windows version.Is there a way to overcome this issue? What could be the cause? Thank you 

 Hi , Subject: i need to reduce the log write time what to do I have an STM32H503 logging ~20 bytes per line (HH:MM:SS , X.X) to a 24Cxx EEPROM over I2C @ 400 kHz, with FAT12 + USB MSC.Blocking time = the main loop stalls ~100–200 ms on each append while EEPROM writes finish.Each line only adds ~20 B of text, but my FAT code does full 512 B sector read-modify-write on the data sector, again on the root directory (file size), plus metadata read/write.That’s ~1 KB+ programmed per line (many 64 B page programs), so EEPROM ACK/program time dominates — not the 20 B payload or I2C speed alone.Basic issue: small appends through sector-based FAT on page EEPROM → huge writes per line.I’m thinking: defer root/meta to session end (back button), RAM cache, write only dirty 64 B pages.Is that the right fix? Can others get ~20–50 ms/line on 24Cxx without dropping FAT?

 As per my custom board pins(I am using single QUADSPI STR) I have selected and i tried to flash via Cube-Programmer CLIVEONE - MT25QL512_STM32H7XX-PB2-PB10-PF8-PF9-PF7-PF6.stldrhttps://github.com/cturvey/stm32extldr/blob/main/h7_mt25ql512a/CLIVEONE-MT25QL512_STM32H7XX-PB2-PB10-PF8-PF9-PF7-PF6.stldrISSUE : flash protection enabled https://github.com/cturvey/stm32extldr/tree/main/h7_mt25ql512aISSUE: I have tried with this external loader but i am not able to erase memory ​

Dear Sir/Madam,I hope this email finds you well.I am currently working on the development and integration of the ECU project using the SPC5Studio environment and the Wind River Diab Compiler (v5.9.4). During the build configuration and linker script optimization for the SPC56 platform, we have identified a need for specific integration assets.Could you please provide the following files to assist us in completing our toolchain setup:SPC560Dxx_RLA PIT WINDRIVER.zip: Required for the PIT (Periodic Interrupt Timer) driver configuration and OS abstraction alignment with the Diab compiler. 56xx_flash.dld: The specific Linker Definition File (LDF) optimized for the Wind River Diab toolchain to ensure correct memory mapping and flash sectoring.These files are critical for resolving current build-time linker errors and ensuring compatibility between the RLA (Runtime Lightweight Abstraction) components and our compiler version.Thank you in advance for your assistance. I look forward to your pro

in debugging mode the values of variables gets corrupted when I check in live expressions. Here corrupted means shows wrong values.

When I compile my code, I get strange errors that make no sense.#define ADC_BUFFER 1000 gives error "expected declaration specifiers or '...' before numeric constant"even though the line above it #define ADC_HIGH_THRESHOLD 3500 doesn't generate an error.HAL_TIM_Base_Start(&htim3); and HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_buffer, ADC_BUFFER); both generate "Syntax error".The TIM and ADC Start errors expanded error message is:  error: expected declaration specifiers or '...' before '&' token /* USER CODE END Header *//* Includes ------------------------------------------------------------------*/#include "main.h"/* Private includes ----------------------------------------------------------*//* USER CODE BEGIN Includes */#include <stdlib.h>#include <stdio.h>#include <stdbool.h>#include <stdint.h>#include <inttypes.h>#include "globals.h"/* USER CODE END Includes *//* Private typedef -----------------------------------------------------------*//

I’m creating a project for NUCLEO-144 (STM32H563ZIT6)and I’m using STM32CubeIDE for Build/Debug.After reading various guides from the Web, I have still notbeen able to see any Console output (trying to use printf()and re-directing the character output with this: int _write(int file, char *ptr, int len){     for (int i = 0; i < len; i++)     {          ITM_SendChar((*ptr++));     }     return len;} Is there an esoteric Config in the IDE that I need to Enable (or Disable)?Have I missed some important item in the Project Creation? (I had used STM32CubeMX)Guidance appreciated!Paul++ 

 The IssueI'm using **nanoMODBUS** (slave mode) on NUCLEO-F446RE via USART2 (115200 baud, 8N1). The slave exposes two holding registers:- `0x0000`: Potentiometer value (read-only) → `usPotValue`- `0x0001`: LED brightness (read/write) → `usLedBrightness`**The LED is controlled via PWM (TIM2).**BehaviorOperation                                                           Result **Write to `0x0001`** (set LED brightness)      Works consistently — LED dims **Read from `0x0000`** (potentiometer)          Fails most of the time **Read from `0x0001`** (LED brightness)        Fails most of the time **Rare successful read**                                  Both registers return correct values Master Log```Response: emptyResponse: emptyRead OK: [609]              ← Rare successResponse: emptyResponse: emptyResponse: 0180018000         ← Truncated exception (5 bytes instead of 7+)Response: emptyRead OK: [609]              ← Another rare success```The 5-byte response `0180018000`- `01` = Slave addre

Hello,while testing 6 types of SPI NAND with MP257, I found no 1V8 part boots (tested 2, MT29F4G01ABB and AS5F18G04SND). While looking at scope traces, 32MHz clock from BootROM is almost sinusoidal.I tested booting from Engineering mode and custom BL, it boots Linux as 21MHz but not at 32MHz. IOSPEED is set to “2” (tested 3 too).Then I set bit 14 in OTP 124 (allow for <2.5V for VDDIO3) and then set PWR->CR1 VDDIO3VRSEL too. Now, it boots with 32MHz from my BL (with IOSPEED 2) and clock now seems much nicer.But BootROM seems to ignore OTP 124 and tries to use 32MHz with 1V8 and GPIO in degraded mode.Is there way to make 1V8 OSPI boot work ? Force ROM to either use slower clock or to set VDDIO3VRSEL.Thanks, Martin

I have an STM32U575 MCU with the PH3/BOOT0 pin permanently pulled down to ground. I need to develop a process to flash a proprietary bootloader to fresh boards (ie. the flash is blank) with this configuration. I am currently using STM32CubeProgrammer to connect to a NUCLEO-U575ZI-Q with an external STLINK-V3 over UART/I2C to simulate this process. Even when the board has been reset and the flash is empty, the board does not jump to the system bootloader unless I drive PH3/BOOT0 high. Is the STM32U575 supposed to automatically run the system bootloader when the flash is empty, or will my inability to drive PH3/BOOT0 high on my product prevent me from accessing the system bootloader?

Hi everyone,I'm working on a project using NASA's Core Flight System (cFS) running over RTEMS RTOS, and I need approximately 8MB or more of external RAM for the workspace/heap.Currently, I'm using a NUCLEO-H753ZI board (STM32H753ZI), which only has 1MB of internal SRAM. I've been looking for an easy way to add external RAM, but I'm running into some challenges.My questions: Is there an easy way to add 8MB+ of external RAM to the NUCLEO-H753ZI? I've looked into FMC-based SDRAM shields/expansion boards, but I haven't found any off-the-shelf solutions that work well with this board. Is there a shield, module, or expansion board I should know about? If adding RAM to this board is not practical, which STM32 board would you recommend instead? I need: 8MB+ RAM, Cortex-M7 (or similar performance), and preferably existing RTEMS/cFS support. I've seen mentions of STM32H745I-DISCO or STM32H747I-DISCO having onboard SDRAM, but I'd like community input on the best choice. My sta

Hi,I'm working on a battery-powered sensor with STM32L071CBTx (LQFP48).The device cycles between Standby mode (~12 µA) and short Run mode (~250 ms).Reading RM0377 Section 20 (IWDG), I understand that:1. IWDG cannot be stopped once started (only reset can stop it).2. IWDG clock (LSI) runs in Standby mode.I have two specific questions:Q1: Does STM32L071CB support an IWDG_STDBY option byte bit that freezes    the IWDG counter in Standby mode (similar to STM32G0/WB/U5 series)?    If yes, what is the bit name and how to configure it via HAL?Q2: If Q1 answer is "no", what is the recommended approach to combine    IWDG-based hang protection with Standby-based ultra-low-power    operation? Two options I'm considering:        (a) Use LSI manual stop via RCC_CSR.LSION = 0 before entering        Standby (does IWDG still run if LSI is stopped?)        (b) Software watchdog using a basic timer (TIM6/TIM7) refreshed        in run mode, NVIC_SystemReset() on timeout.Best regards, 

I was trying to use the xcube_TOF application inside the st32cubemx for the stm32h7 nucleo board. However, the tof initialisation is keep getting failed. Is it really possible to implement a i2c connection between x_nucleo_53l8a1 and the stm32H7 nucleo board? I tried to implement the hardware connections just like in the stm32nucleof401re.Could anyone please help me with this?

Hi ST team, I am using STM32L4Q5VGT6 I need to use 2xQuad SPI memory. I need a confirmation whether we can use OCTOSPIM_P1_NCS pin from PE11 & PA2 CS-pin as individual cs pin for both Quad memory chip.  Thanks, 

Environment & hardware:STM32F722RET6:LQFP64USB3300EZKSTM32CubeIDE v2.1.1STM32CubeMX v6.17.0Windows 11 OS Description of problem:I am trying to use ULPI with external HS USB phy with the follwing schematic:when calling MX_USB_DEVICE_Init(), it will be stuck at  /* Required few clock cycles before accessing USB PHY Controller Registers */for (volatile uint32_t i = 0; i < 10; i++) { __NOP(); // No Operation instruction to create a delay} /* Core Soft Reset */ USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; do { count++; if (count > HAL_USB_TIMEOUT) { return HAL_TIMEOUT; } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); return HAL_OK;}in USB_CoreReset(), eventually returning HAL_TIMEOUT. Images of USBx and RCC:USBx before core soft resetUSBx after soft core resetRCC before & after soft core resetMy clock configuration, everything not included in this image is greyed outULPI pins: /**USB_OTG_HS GPIO Configuration PC0

My design uses a STM32H750VBT6 MCU with the USB3300-EZK PHY for high-speed USB. The hardware and software implementations are complete and in general everything works extremely will. The only issue I am seeing is that there are occasional startup problems with the host computer (both Mac and Linux) reading the device descriptor. This occurs about 10% of the time. The Linux error log is: <6>[19177.992026] usb 1-1.1.4: new full-speed USB device number 75 using xhci-hcd<3>[19178.072046] usb 1-1.1.4: device descriptor read/64, error -32<3>[19178.260043] usb 1-1.1.4: device descriptor read/64, error -32<6>[19178.448021] usb 1-1.1.4: new full-speed USB device number 76 using xhci-hcd<3>[19178.528074] usb 1-1.1.4: device descriptor read/64, error -32<3>[19178.716051] usb 1-1.1.4: device descriptor read/64, error -32 A normal connection log as follows: <6>[19166.984026] usb 1-1.1.4: new high-speed USB device number 74 using xhci-hcd<6>[

Hello,I am currently trying to leverage STM32H753 FMC feature to interface with legacy Motorola flexbus style peripheral.I suspect the answer to my question is no but I could not find an explicit statement within documentation saying it is precluded hardware wise :Is there a mode / configuration (down to the registers level) that could allow the write enable signal (WE) to be asserted before the chip select signal (NE) ?Thanks