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Hello ST Support team,We are building a product on the STM32N645 with the STM32CubeN6 OEMuRoT secure boot flow (MCUboot-based OEMuRoT, application image in external XSPI2 NOR, executed in place). We want to re-open debug on closed devices with the OEMuRoT password debug authentication (DA), using STM32CubeProgrammer, the way it is shown in ST's videos. CubeProgrammer cannot start the DA on our devices. We wrote our own host tool, and with it the same OEMuRoT firmware opens debug correctly. We need your help to make the standard CubeProgrammer flow work, because it is the procedure we want for production and service.1. SetupItem Version / state MCU STM32N645 (DBGMCU DEV_ID 0x486) Firmware package STM32CubeN6 [version]; debug_authentication.c of OEMuRoT is unchanged from the reference (same in V1.1.1 to V1.4.1) apart from the points in section 4 STM32CubeProgrammer v2.23.0 (SDM library v1.4.0, SDM API v1.0) Probe ST-LINK V3SET, firmware V3J16M8B5S1, SWD, NRST connected Boa

Dear ST Support Team / FAE Team,We are currently developing a product using the ST67W611M1 Wi-Fi/BLE combo module on an STM32H563ZI host platform (using X-CUBE-ST67W61 / W61 AT driver).During our integration and validation phase, we uncovered two high-severity bugs within the ST67W6X NCP firmware (SDK Version 2.0.89 / BT Stack Version 1.9.56) that render the BLE GATT server unusable for production:GATT Read-Data Corruption: Any characteristic value set via AT+BLEGATTSRD that exceeds 23 bytes (the default ATT MTU payload boundary) gets systematically corrupted. A 32-bit little-endian length field is overwritten directly into the data buffer starting exactly at offset 23. Missing Notify Property & CCC Descriptor: When registering a characteristic with the Notify property enabled, the NCP's internal database (AT+BLEGATTSCHAR?) reflects the property correctly, but the exported GATT database exposed to the BLE client drops the Notify bit and completely omits the Client Characteristic Co

HiI am trying to program STM32U535 series IC via CLI method. It will be good enough to know and understand any return code for STM32 programmer. I have checked on forum and understood, this was not available for long time.Is CLI return codes are available for STM32Programmer?

I am following https://www.st.com/resource/en/product_presentation/evlspin32g4-act-and-stwinbox-high-speed-datalogging-for-motor-control-and-sensors-quick-start-guide.pdf using hardware STEVAL-STWINBX1+EVLSPIN32G4-ACT  https://github.com/STMicroelectronics/stdatalog-pysdk.git v1.5.0 stdatalog_MC_GUI.py is able to start/stop the motor operated in sensorless mode, correct GUI view and .dat file stored for all onboard sensors. But enabling slow/fast motor telemetries leads to error message: “HSDatalogApp.stdatalog_gui.HSD_GUI.HSD_Controller - ERROR - No data from fast_mc_telemetries Component.” For suggestion “Restart the acquisition lowering component ODR to acquire data correctly.”, I tried to only enable one data item in slow telemetry, and had the same failure. FW build env for both PMSM and STWIN.box:MotorControl Workbench_6.3.0 STMCubeIDE 2.1.1 STMCubeMX 6.12 STM32 FW V1.5.2 When importing the STWIN.box FW project, among three projects(DATALOGMC, DATALOGMC_CubeAI, DATALOGMC_NanoEdge

Hello, I would appreciate a 3D-printable cover for STM32H573I_DK. Does someone happen to have it? Can you eventually recommend me a place to find it?Thank youVaclav

Hello,I am using a new STEVAL-STWINBX1 with FP-SNS-DATALOG2 v3.4.0 (DATALOG2_Release.bin from the GitHub package, Wi-Fi module updated with EMW3080update v2.3.4). SD logging works correctly when the board is powered via USB. On battery, the logging stops by itself about 1 second after pressing USR, every time.Observations:- The battery is the original LiPo supplied with the kit. Measured with a multimeter: 4.15 V on the battery and 4.15 V on the battery pins of the board.- ST BLE Sensor app always shows "battery: 0%", also after more than 2 hours of charging (5 V USB charger).- On battery the app shows "alarm: Low Battery"; with USB connected it shows "No Alarm".- The red LED blinks fast while the charger is connected.- SD card: SanDisk Ultra 16 GB, FAT32, 32 KB allocation unit. Logging on USB power runs without errors (sd_failed = false).- With the battery disconnected the firmware also reports 0 %, i.e. the reading does not change between 0 V and 4.15 V.From the source code, the batt

Hello, our Teseo LIV4F (mounted on a race boat) drops fixes during accelerations and takes about 2-3 seconds afterwards to get a fix again.By looking through the forums and asking LLMs it seems like this is something that can happen when the dynamic model is incorrectly set to Pedestrian or Static. This information however was for the TESEO-LIV3 specifically, where the dynamic model is also documented. We couldn’t find any documentation about this parameter for the LIV4F, instead.I’d like to ask if this is a known issue and how we could go about solving this.Additionally, it also seems like increasing the fix rate to > 1Hz makes the chip unstable, dropping fixes after about 10 seconds after incorrectly heavily drifting and reporting speeds >= 50kn when the boat is stationary. After this it never recovers. Setting the fix rate back to 1Hz solves this.We believe the latter issue could be solved by updating the firmware, something that we’re working on as I’m typing this.Thanks for

Hi,I'm working on a product based on the STM32WB5MMG module, running the BLE + Thread dynamic concurrent CPU2 binary (stm32wb5x_BLE_Thread_dynamic_fw.bin v1.24.0, FUS 2.2.0). Our boards are Thread routers.The 802.15.4 link margin is too low for us. Two boards 1 m apart see each other around -85 / -88 dBm, so I'd like to raise the Thread TX power. BLE is set to +6 dBm with aci_hal_set_tx_power_level(1, 0x1F) and works fine. For Thread we never set anything, so it runs at the stack default. The SMPS is not enabled in our code, so the chip is powered in bypass at 3.3 V.I tried otPlatRadioSetTransmitPower(NULL, x):called at Thread start on both boards with 6, -6, -20 and 0x1F: the boards don't attach to each other anymore. Remove the call, reflash, and everything works again. 6 on one board only, at the end of our Thread init (before BLE advertising starts): the board attaches and goes up to router, and it receives the multicast CoAP messages from the other board. But the other board never

When I extracted the dimensions from the Gerber files of the flex antenna included in the ST25DV04K DISCO kit and entered them into your online tool, the calculated inductance was 5.69 µH. The input capacitance of your IC is 28.5 pF. Using the resonance frequency formula and substituting (L=5.69,\mu H) and (C=28.5,pF), the calculated resonant frequency is approximately 12.5 MHz, which is below the target frequency of 13.56 MHz. I also noticed that the PCB layout includes a footprint for an additional parallel capacitor, presumably for tuning the antenna. Adding a capacitor in parallel would increase the total capacitance and further lower the resonant frequency. Could the inductance value calculated by your online tool be inaccurate? I have attached a screenshot showing the parameters I entered into the tool for reference. 

Hi ST Support Team,We encountered a reproducible HardFault when running an object detection model on the STM32N6570-DK, and have completed extensive isolation testing. We believe this points to an issue in the STEdgeAI 4.0.1 / Neural-ART toolchain combined with the Getting Started reference application (concurrent camera/display/NPU usage), rather than a configuration mistake on our side.[Environment]- Board: STM32N6570-DK (with IMX335 camera)- Project: Getting Started Object Detection App (stm32ai-modelzoo-services)- Model: st_yoloxn (1 class, 416x416), Quantized (input: uint8 / output: int8)- Toolchain: STEdgeAI Developer Cloud v4.0.1 (forced by cloud; v4.0.0 is no longer offered, though the project's own README states the shipped model files were generated with v4.0.0)[Symptom]Build, flash, and boot-from-flash all complete without error, but the LCD stays black. Debugging via STM32CubeIDE shows a HardFault during NPU inference:HardFault_Handler()__LL_ATON_RT_IrqErr(irqs)   // ll_ato

When TxRSTU and RETRIG are enabled with CONT disabled, will the timer still trigger a register update when it's counter reaches it's PER value? Since it says in the image below that the PER event is generated but says it re-starts from 0 when it's reset but doesn't mention roll-over, and the image above says it'll update registers on timer reset and rollover. Essentially what I'm asking is does it count as a roll-over when the timer reaches its period value when CONT=0? Since I need to know if it'll update it's registers at the end of it's period or no.Any help is much appreciated :) 

 Hello, When I try to create a project, I get a message saying that the project already exists in the workspace.However, I don't have such a project anywhere on my PC.        When I select Yes, I am asked if I want to delete an old project (which doesn't actually exist). When I check the box and select OK, I get a success message, but it looks different from other healthy projects in Explorer and I can't build it.          I uninstalled CubeMX and CubeIDE and deleted as many related folders as possible.C:\Users\<UserFolder>\.stm32cubeideC:\Users\<UserFolder>\.stm32cubemxC:\Users\<UserFolder>\.stm32cubeupC:\Users\<UserFolder>\.stmcufinderC:\Users\<UserFolder>\STM32CubeC:\Users\<UserFolder>\STM32CubeIDEC:\Users\<UserFolder>\STMicroelectronicsC:\Users\<UserFolder>\AppData\Local\Programs\STM32CubeMXC:\ST Reinstalling CubeMX and CubeIDE and creating a project again resulted in the same problem.Where is the information for this non-existent pro

Hi,I am using the STM32H7S7L8H6H microcontroller paired with the APS256XXN-OBx9 PSRAM, configured for two main purposes: Framebuffer for TouchGFX. (320*240 16bpp dual frame buffer). Heap region for FreeRTOS (heap_5.c), as my application is large and combining SRAM3 with DTCM leads to full SRAM To follow ST's recommendations for TouchGFX, I configured the MPU without caching for the PSRAM region. However, this causes the FreeRTOS heap located in that same region to be non-cached, resulting in significantly slower performance.I attempted to divide the PSRAM into two separate MPU zones (one cached for the heap and one non-cached for the framebuffer), but doing so introduced graphical glitches on the screen.Do you have any recommendations or best practices to mitigate this issue and achieve both good heap performance and stable display output?Thanks  

We have integrated the LIS2DW12 accelerometer with our ESP32-C6 module and successfully obtained coordinate readings, observing changes in the readings when the sensor's position is changed.However, we are facing difficulties verifying the interrupt functionality. Although we configured and probed the interrupt pin, we could not observe any voltage-level changes. We also connected the pin to an oscilloscope but were unable to detect any state transitions or variations in the output waveform.Kindly guide us on the correct procedure for configuring and verifying interrupt detection. Additionally, please clarify the functional differences between the INT1 and INT2 pins, their respective interrupt capabilities, and the recommended method, any example code or alternative part for confirming that the interrupt outputs are functioning correctly.

Hello am designing a 6S battery pack (25 V nominal) around the BQ40Z80 and would appreciate your feedback on my schematic before I proceed to layout. I used the BQ40Z80 EVM reference design (datasheet Figure 7-1) as a starting point and adapted it for a higher current.Design summary -Cells: 6S (VC1–VC6), with 100 Ω / 100 nF RC filters on each cell input.- Current: 60 A continuous, 80 A peak (the charge current is lower).- Current sense: 1 mΩ shunt on SRP/SRN, which gives about 75 mV at 75 A. This is within the ±100 mV input range of the device.- Protection FETs: 3× BSC014N06NS in parallel on the CHG side and 3× in parallel on the DSG side, in a common-drain back-to-back configuration.- Gate drive: single gate resistors per FET (1 kΩ on the CHG side, 12 kΩ on the DSG side), 10 MΩ gate-source resistors, and clamps on the gate-source of the DSG FETs.- Pre-charge/pre-discharge: P-channel MOSFET (Q41) in series with a 100 Ω / 3 W resistor (R140), driven by a BSS138 from LEDCNTLA (PCHG is no

Hello,On an STM32H5F4, programming the EDATA (high-cycle data) area with STM32_Programmer_CLI -d finishes with "File download complete" and exit code 0, but nothing is written to flash. NB: The same procedure works on an STM32H573.EnvironmentSTM32CubeProgrammer CLI v2.23.0 (Linux) Target: STM32H5F4 (DEV_ID 0x47A), product state Open (0xED) Probe: ST-LINK, SWD, mode=UR, reset=HWrst Option bytes: EDATA1_EN=1, EDATA1_STRT=7, EDATA2_EN=1, EDATA2_STRT=7 (last 8 sectors of each bank used as EDATA)Steps to reproduceEnable EDATA on both banks:STM32_Programmer_CLI -c port=SWD mode=UR reset=HWrst -ob EDATA1_EN=1 EDATA1_STRT=7 EDATA2_EN=1 EDATA2_STRT=7 Confirm the target area is mapped and blank (it reads back without error as all 0xFF):STM32_Programmer_CLI -c port=SWD mode=UR reset=HWrst -r32 0x09028800 0x10 Program 16 bytes:printf '\xA5\x5A\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0A\x0B\x0C\x0D\x0E' > test.binSTM32_Programmer_CLI -c port=SWD mode=UR reset=HWrst -vb 3 -d test.bin 0x09028800 Read

Hello guys  I am working on a switch mode power supply with PFC  and for the latter I have picked L4984D IC.  The reference circuit design I obtained with the help of eDesignSuite online tool.   Upon assembly of the circuit, as a safety measure , I powered it through a series bulb and straight away, things did not look promising. there were no shorts, but the voltage at the INV pin measured at 0.7v , which according to the datasheet ,told me that there was a feedback failure. After inspecting all the feedback resistors and double checking the circuit, I discovered that VCC voltage was dropping below VCCON. rectified it and then Series Bulb light up brighter than before and had a pulsating visuals( not completely dimming). did more checking and found out that the main bulk voltage was dropping to 110V , which is far too low and now the only suspect seemed to be the series bulb. before bypassing it, I did one final measurements to make sure it was safe to directly turn the circuit and th

Hi everyone,I'm not sure how many of you are already working with the STM32C5, STM32CubeMX2, and Keil Studio, but I'm experiencing some issues with this setup. I know that both STM32CubeMX2 and Keil Studio are relatively new products, so some issues are to be expected. However, I'd be interested to know whether anyone else is experiencing the same problems.I'm using STM32CubeMX2 to create a project for the NUCLEO-C562RE board. I then generate the IDE project in Open-CMSIS format. Once the generation is complete, I open the project in Keil Studio. So far, everything works fine: I can open, build, and debug the project without any problems.However, when I navigate to CMSIS → Components → STMicroelectronics:Device Codegen Code@2.0.0 and click Run Configuration Generator, I get the following error:executing generator 'stm32c5xx_hal_mx2codegen' for context 'test.debug_AC6+NUCLEO-C562RE' failedWhen I run the generator manually in verbose mode, I get the following error:csolution run c:\git\n

Hi ST Community, I discovered nucleo board 2 weeks ago because I want build spectrometer using a Toshiba TCD1304DG CCD sensor.I’m reaching out because I need your help understanding how to drive this ccd sensor. I’ve read datasheet and projects on internet to get a general understanding of how to operate this sensor. However, there are a few points I’m still unsure about. Could you please help me clarify the following questions? Here is the datasheet : https://toshiba.semicon-storage.com/info/TCD1304DG_Web_Datasheet_en_20260520.pdf?did=13709&prodName=TCD1304DG 1. Is my understanding of the acquisition sequence correct?My understanding is that, to read all 3,694 pixels using a hardware timer, the ADC, and DMA, the acquisition sequence should be as follows: Set ICG LOW. After 500 ns, set SH HIGH. After 5,000 ns, set SH LOW. After another 5,000 ns, set ICG HIGH. Read all 3,694 pixels from the OS pin. The master clock (M) runs continuously, shifting the pixel values out sequentially, w

Hi I am using STUSB4500 using a usb c connector. The usb c connector is connected to XP power ac dc 65w adapter  capable of delivering 20V, upto 3.25A. STUSB4500 is never programmed over I2C and should have its default PDOs. By default settings I mean when it is connected to the XP charger, it should request by default 20V,1A from this source. Since its Req_src_current but is also 0 by default, so it should only demand 20W(20V,1A) from source even though source can deliver upto 3.25A. But I desoldered a 0 ohm resistor in the usb vbus path  after STUSB4500 and installed ammeter there and found out that 2A is flowing through vbus instead of 1A. Is this normal?As I see 20V is being delivered to load but the current is double than what’s requested. One thing worth mentioning is that load connected on the downstream path after STUSB4500 is capable of receiving upto 2.8A.but I don’t think load should have anything to say here and the STUSB4500 should request only its default 20V, 1A from PGW

Hi,We’re using an STM32U5G9 with a MIPI DSI panel (driven by the LTDC through the DSI host). The panel is 800×600 and scans in landscape, but it’s mounted rotated, so the user sees a 600×800 portrait image. The panel controller can’t swap its scan direction; the manufacturer confirmed that only X/Y flips are supported.Current pipeline: JPEG frames arrive over the network. The hardware JPEG codec decodes them in bands of about 32 lines, and DMA2D converts each band (YCbCr → RGB888) straight into a single framebuffer that the LTDC scans. There’s no double buffering, because of RAM: the framebuffer alone is about 1.4 MB. Today the server sends frames already rotated to panel orientation.Goal: a framebuffer in the logical (portrait, 600×800) orientation. We could then implement scrolling by remapping lines with the GFXMMU (a ring buffer), and only decode the newly exposed lines.Questions:Can the LTDC or the GFXMMU present a 90°-rotated view of a framebuffer to the panel, without any interm

Section 2.5 of UM3656 says "For a complete description of the library capabilities, refer to the vl53l9-transform-c documentation." The X-CUBE-53L9A1 v1.0.0 package ships Documentation/ media-object/transform-c.chm and media-c.chm, but those document the generic transform framework they do not contain any mention of VL53L9, binning or resolution.In vl53l9-transform-c, _retrieve_output_size() accepts only raw frame sizes 14842 (54x42) and 3844 (24x20); the stream capability tables likewise list only those two resolutions. Calling the pipeline at other binnings is rejected, so 18x14, 12x10, 8x6 and 4x4 produce raw data with no calibrated depth.The underlying algorithms appear resolution-generic — vl53l9_algo_extract() takes frame width/height, crop offsets and binning as parameters, the calibration offset map is bicubic-resized to arbitrary width/height, and the radial-to-perpendicular map is computed per width/height/binning.Questions:Is support for the other binnings planned, or delibe

Hello,I’m working with a NUCLEO-N657X0-Q board and trying to run inference using the ST Edge AI embedded client API. The STM32CubeIDE project I’m using was generated with CubeAI Studio. Input, output, weights and activations buffers are preallocated. Here are the advanced settings I used in CubeAI Studio: Even though the validation with CubeAI Studio was successful, I edited the app_x-cube-ai.c file in order to validate my samples again so that I know I’m feeding data into the network and obtaining the outputs correctly. This is were I noticed that the prediction of every single sample is incorrect. Since I got over 98% accuracy with CubeAI Studio, I assume I’m doing something wrong in my code. Unfortunately, I can’t really figure out what it is. I only made a few minor changes to the app_x-cube-ai.c template. I’m basically interacting with the network like follows:static float* input_states_ptr;static float* input_currents_ptr;static float* output_states_ptr;static stai_ptr stai_input

Setup- Board: STM32N6570-DK, Neural-ART NPU, dev boot.- Tool: ST Edge AI Core 4.0.1 (target stm32n6), ll_aton 1.1.3.275 / NetworkRuntime1201_CM55_GCC.a.- Model: ViT-style autoencoder encoder. Input 1×3×256×256 RGB, output INT8 [128,12] → 128 LE-uint16 tokens (256 B). Weights in xSPI2 NOR @ 0x70380000.Problem 1 — wrong latent (NPU)The board latent doesn't match ONNX Runtime on the compiled graph (0/128 tokens). Epoch tracing shows input, weights and the first conv are correct, but the first Concat output is placed by the planner on top of one of its inputs:input1  [1,256,512] @0x34310000output  [1,257,512] @0x34310000   (starts where input1 starts)LL_ATON_LIB_Concat copies inputs in order with forward memcpy, so it corrupts the tensor (every row becomes the class token). I added an overlap-safe copy as a local patch; that fixes the Concat, but a second fault remains in epochs 8..72 (first LayerNorm / start of the first attention block) → latent still wrong.Problem 2 — speedOne encode is

Hello,Recently I decided to run STM32N6 NPU under non-secure Zephyr and encountered a bug in LL_ATON library. To begin with, this is my platform and SW:Board: NUCLEO-N657X0-QSoC: STM32N657X0H3QLL_ATON: atonn-v1.1.3-275-g6770925dRuntime: NetworkRuntime1201_CM55_GCC.aSTEdge AI: v4.0.1-20581 7ed50de05   ISPU 2.0.1-RC2   MLC 1.2.4-RC2   STM32CubeAI 12.0.1-RC2Model: st_yolodv2milli_actrelu_pt_coco_person_192_qdq_int8.onnxSW: OEMUxROT (S) + Zephyr (NS)XIP: enabledMy application runs in non-secure world and the NPU keeps addressing AXISRAM3-6 through the secure alias (0x342...), so the memory pools in the generated network are placed there. Then, the non-secure CPU is unable to access that alias, because it is running in non-secure and should access via non-secure alias (0x242...). In most cases LL_ATON utilizes ATON_LIB_PHYSICAL_TO_VIRTUAL_ADDR to access correct region, but there are few places that pass address directly instead of utilizing proper macro.Reproduction steps:1. Run a network f