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Hi, During the development of a bare-metal driver for USB CDC (virtual com port) in device mode i noticed an unexpected behaviour when trying to configure the USB Core to do a transmission of a multi packet message. I've got the following code which prepares the transmission over usb for a data array "data" whose size is "dlen" over endpoint number "epNr". "epInBuffers" contain the pointers to the data buffers for each endpoint, "epInBytesTransferred" keep track of how many bytes have already been transmitted and "epInDataCntrs" the total amount of bytes to transmit. __RAMFUNC void prepareUSBTransfer(uint8_t epNr,const uint8_t*data,uint16_t dlen) { USB_OTG_INEndpointTypeDef * inEndpoint = ((USB_OTG_INEndpointTypeDef*)(USB2_OTG_FS_PERIPH_BASE + USB_OTG_IN_ENDPOINT_BASE + epNr*0x20)); uint32_t epCtrl = inEndpoint->DIEPCTL; uint16_t npackets; if(dlen==0) { npackets = 1; USB2_OTG_FS_DEVICE->DIEPEMPMSK &= ~(1UL << epNr); } else { npackets = ((dlen + epInMaxPacket

Hi, I have been developing IoT application for the  B-U585I-IOT02A (STM32U585AI) and encountered following problem:When attempting to set a socket to non-blocking mode  MX_SO_BLOCKMODE = 1 using the MX_WIFI_Socket_setsockopt() API the call fails immediately and returns -1.Steps to reproduce:1. Create a socket using MX_WIFI_Socket_create()2.Try to configure  MX_SO_BLOCKMODE = 1     MX_WIFI_Socket_setsockopt()3. Get instant -1 in the runtimeMinimal Reproducible Code#include "mx_wifi.h"#include "mx_wifi_bare_os.h" /* Using Bare OS mode */void test_nonblocking_socket_config(void){ int32_t sock = -1; int32_t optval = 1; /* 1 = Non-blocking mode */ int32_t ret = -1; /* 1. Create TCP Socket */ sock = MX_WIFI_Socket_create(MX_WIFI_AF_INET, MX_WIFI_SOCK_STREAM, MX_WIFI_IPPROTO_TCP); if (sock < 0) { /* Handle socket creation failure */ return; } /* 2. Configure Socket to Non-blocking Mode */ ret = MX_WIFI_Socket_setsockopt(sock,

Hello,  please help on the title topic, thanks.

Hello,I am using an STM32F207VC custom board with Ethernet and LwIP. I am facing an issue related to Ethernet cable connection during power-up.I performed the following tests:Test A: Ethernet cable connected before power ONConnect the Ethernet cable.Power ON the STM32 board.Result:Ping: WorkingTCP server connection: WorkingTest B: Ethernet cable disconnected during power ONDisconnect the Ethernet cable.Power ON the STM32 board.Wait until all STM32, Ethernet, and LwIP initialization is completed.Connect the Ethernet cable.Result:PHY Link Up: DetectedPing: WorkingTCP server connection: Not workingTest C: Cable disconnect and reconnect after normal startupStart the board with the Ethernet cable connected.TCP server works normally.Disconnect the Ethernet cable.Reconnect the Ethernet cable.Result:Ping: WorkingTCP server connection: WorkingThe issue occurs only when the STM32 board is powered ON while the Ethernet cable is disconnected and the cable is connected later.Since ping works and th

Hello ST Team,I want to use USB interface to update firmware of STM32F405RGT6 MCU.We have verified it with USB DP and DM from external USB but now want to put in our board.Our board is also generating 5V and USB will also have 5V. What should I do so that it will not conflict or cause any issue? How to connect CC1 or CC2 pins of USB to our MCU so that we got to know connection is available from USB? If we want to do firmware update using USB then how our MCU will go in boot mode?Please find screenshot of our schematic which we are working now: 

Hello Community,I would like to report another significant logic bug in the generated firmware libraries for the Vienna Rectifier project (specifically located in the Digital Power Control stack file BSP/DPC_FW_PACK/src/DPC_Loopctrl.c).The Issue:Inside the function DPC_LCT_FeedForwardCtrl(..), the firmware is supposed to evaluate whether the AC Voltage Feed-Forward task is enabled before adding the d-axis and q-axis AC feed-forward grid terms (fVd_feed_sub and fVq_feed_sub) to the current loop outputs.However, the original ST framework code erroneously checks the DC voltage feed-forward enable flag instead of the AC one.The Code Snippet:cvoid DPC_LCT_FeedForwardCtrl(DPC_LCT_CDC_t *pCDC_sub, float *pVd_ctrl_FF_sub, float *pVq_ctrl_FF_sub){ float fVd_feed_sub = pCDC_sub->fVdFeed; float fVq_feed_sub = pCDC_sub->fVqFeed; float fVd_ctrl_sub = pCDC_sub->fVdCurrentCtrl; float fVq_ctrl_sub = pCDC_sub->fVqCurrentCtrl; /* AC feedforward task */ // BUG: Checks bVDC_FF_Enable

Hello Community,I am writing to report a highly critical issue regarding the Vienna Rectifier reference project generated and downloaded via eDesignStudio / Digital Power Workbench (targeting the STM32G474 MCU).The Issue & Context:Upon downloading the automatically generated project package from the eDesignStudio platform and opening the .ioc configuration file locally, STM32CubeMX flags that the template is outdated and prompts the user to either maintain legacy libraries or migrate.The downloaded template from eDesignStudio was built with legacy STM32CubeMX V6.14.0 and STM32Cube FW_G4 V1.6.1. Modern local environments prompt for a migration to STM32Cube FW_G4 V1.6.3. The Critical Hardware/Firmware Bug:If a developer chooses the "Migrate" path to align the project with modern libraries, the automatic code generation introduces a catastrophic control bug:After completing the migration, generating the code, and flashing the MCU, HTRIM2/Timer A output generates incorrect PWM switchin

We are using an STM32C091CCT6 with the internal HSI (48 MHz) configured as the system clock.Our application generates a volume-based pulse output using TIM14 in one-shot compare mode. The output pulse frequency is derived from flow rate, and the receiving equipment measures the number of pulses generated per second. Therefore, maintaining an accurate 1-second timing window is important for correct pulse frequency and flow indication.Timer ConfigurationMCU: STM32C091CCT6 Clock source: Internal HSI (48 MHz) SYSCLK: 48 MHz TIM14 clock: 48 MHz Prescaler: 47 Timer resolution: 1 µs per tick Pulse window: 1,000,000 timer ticks (expected = 1000 ms)ObservationWhen measuring the pulse window using a logic analyser, we consistently observe the following:Expected pulse window: 1000 ms Measured pulse window: ~995 ms Timing error: approximately 0.5%This timing difference directly affects the pulse-per-second measurement used by downstream equipment.Current WorkaroundTo compensate for the observed ti

Hi ,I am using STM32H573VIT3Q MCU, I need USB so i am using internal PHY. I configured all in cubeMx all other things are working well only problem is with USB. I have tried both Host and Device modes but nothing works. Then i created a test project only for USB in device mode, I have connected the logic analyser on USB pins to see the data , but no single pulse is there if i plug/ unplug the usb cable to PC. I have attached this full project as well for your reference. I have tried GPIO toggle to confirm all connection are ok and well soldered. Here is my circuit diagram of MCU.I have also attached my IOC files. Please help me to solve this error. Thanks

Hello all, Im Currently working with my own Hardware with the L072CZTx on it.I want to use a Terminal over the 2 USB Pins.(USB_DP and USB_DM)I activated the Clocks with 48MHzActivated USBActivated USB_ Device as a Communication Device Class(Virtual Port COM) I got told i should see it in the Device Manager as a Com Port or a unidentified Device.Sadly i can only see my V3set im using to Programm the Controller with (SWD). If very new to Programming with STM32 and if you have any ideas that could fix it i would really appreciate it. Thank you in Advance

I am trying to capture timestamp values using STM32G474RE. Requirement I need to route: COMP1 output -> Timer input capture COMP2 output -> Timer input capture On each comparator edge, the timer should capture the current counter value and transfer it to RAM using DMA. In addition to edge captures, I also want the same timestamp stream/buffer to receive an entry whenever the timer overflows/updates. Example desired stream: (Consider its a 8bit Timer) 240, 244, 248, 254, overflow_marker_or_last_CCR, 6, 8, 12 or during no-edge periods: 200, 200, 200, 200 if the update DMA reads the last captured CCRx value. STM32F072 behavior On STM32F072, I was able to achieve similar behavior by enabling both DMA request bits: TIMx->DIER |= TIM_DIER_CC1DE | TIM_DIER_UDE; This allowed the DMA stream to be triggered by both: capture/compare event update/overflow event Issue on STM32G474RE On STM32G474RE, DMA routing goes through DMAMUX. For example: TIM2_CH1 has one DMAMUX request

The MCU works fine the first time it gets programmed. However, after one power cycle, it freezes completely after an external  interrupt happens. Doesn’t even enter the error handler. I have SMPS enabled. Thanks for your help int main(void){ /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the System Power */ SystemPower_Config(); /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_RTC_Init(); MX_UART4_Init(); /* USER CODE BEGIN 2 */ GreenLEDOn(); HAL_Delay(5000); GreenLEDOff(); /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { if(!HAL_GPIO_ReadPin(V_Fu_Trig_GPIO_Port, V_Fu_T

EnvironmentBoard: NUCLEO-C562RE MCU: STM32C562RET6 STM32CubeMX2: [your version] Project type: CMake Middleware: FreeRTOS configured through STM32CubeMX2ProblemWhen a FreeRTOS task is configured in STM32CubeMX2, the task creation code and task entry function are generated in:generated/middleware/freertos/mx_freertos_app.cThe official ST tutorial for using FreeRTOS with STM32CubeMX2 also shows application logic being implemented directly inside the generated task function:https://community.st.com/stm32-mcus-60/how-to-use-freertos-with-stm32cubemx2-161926However, after modifying the generated task function and running IDE Project Generation again, STM32CubeMX2 detects mx_freertos_app.c as an externally modified generated file and reports a conflict.The original file can be preserved as a backup when "Overwrite with backup" is selected, so the application code is not silently lost.However, this means that normal project regeneration requires conflict handling and potentially manual merging

I am building a live camera feed project using an STM32H747I-DISCO (MB1166-A09) board and a B-CAMS-OMV (MB1683-CAMS-A02) camera module.I tried using the standard example capture mode ,i set up everything but i always get stuck here ,any solutions?

I built a low-power board using an STM32L031. The code I use to enter STOP mode and STANDBY mode is shown below.In STANDBY mode, the board consumes about 2 µA. However, in STOP mode, it consumes about 90 µA, and I am not sure why there is such a large difference.The circuit only consists of the STM32L031 and the power supply section. Could there be a problem with my code? Why is the current consumption so much higher in STOP mode than in STANDBY mode? void EnterStopMode(void){ __HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_2); HAL_NVIC_ClearPendingIRQ(EXTI2_3_IRQn); HAL_SuspendTick(); HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); SystemClock_Config(); HAL_ResumeTick();}void EnterStandbyMode(void){ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_CLEAR_FLAG(PWR_FLAG_SB); HAL_PWR_EnterSTANDBYMode();}

I have been trying to download the STM32CubeProgrammer for several hours without success.  It looks like this is a common problem.  Could you please look into this?

I am using TIM1 CH1 in PWM mode with the TIM1 repetition counter (RCR) to generate a finite number of STEP pulses for a stepper motor. The desired step frequency is calculated from the motor speed, and ARR/CCR1 are configured accordingly. RCR is set to steps - 1 so that the PWM should generate the requested number of periods and then stop.I am using HAL_TIM_PWM_Start() and the TIM1 update interrupt to detect when the required number of pulses has completed. The update callback is working correctly and HAL_TIM_PeriodElapsedCallback() is being called at the expected completion point.However, TIM1 CH1 is not generating the PWM pulse train correctly, or in some cases no PWM is visible at all on the output pin. I have tried configuring PSC, ARR, CCR1, RCR and the update event/flags before starting PWM, but I am still unable to get the finite number of PWM pulses reliably.I have attached my motor_driver.c file for reference. Could you please review the implementation and let me know if I am

Hi,Chip: STSPIN32G0602Q (STM32G031 core + integrated 3-phase gate driver)Board: custom BLDC driver board, powered via 115VAC through an isolation transformer into the board's own AC input; the board's onboard PFC/rectifier stage converts this to the internal DC buses (HV+ ~400V DC bus, and VBUS ~50-120V DC, which is the rail actually switched by the MOSFETs under test)Purpose of this test: end-of-line (EOL) production test — statically turning on one high-side MOSFET and one low-side MOSFET on different phases (e.g. U-high + V-low) for a short, controlled period, then checking output voltage/current, to verify each MOSFET pair switches correctly before the board ships. This is a functional pass/fail check, not normal motor operation — no continuous PWM switching or motor commutation is involved.Problem: TIM1's gate outputs never turn on. Root cause traced to: BIF (break flag) is always set, so MOE can never be enabled.What happensI start a TIM1 channel (HAL_TIM_PWM_Start + HAL_TIMEx_PW

Recently, I started using the ST67W6 Wi-Fi module on a custom PCB with an STM32H723VET MCU to implement the HTTP Server application provided by ST.The application requires D-Cache to be enabled in order to operate correctly. However, as soon as I enable the D-Cache, my other peripherals that rely on DMA transfers, such as SDMMC and ADC, stop working correctly or fail completely. When I disable the D-Cache, all of these peripherals work normally again, but the HTTP Server application no longer functions, and I am unable to detect or connect to the Wi-Fi network.From what I have studied, I suspect that the issue is related to cache coherency between the CPU and DMA peripherals. My understanding is that I may need to configure the MPU to place DMA buffers in a non-cacheable memory region, or otherwise separate the memory used by the Wi-Fi module from the memory used by other DMA peripherals.However, I am still learning about MPU configuration, cache management, and memory mapping on STM32

Hi,I am using my own board based on an STM32F207ZG and STM32F2 HAL v1.9.4.I implemented an HID Host using STM32CubeIDE (v1.19.0), simply selecting USB Host and HID class support in CubeMX and generating the code.I was able to read key events from a standard USB desktop keyboard. However, I was not able to read any key events from a USB HID RF tag reader.While debugging usbh_hid.c, I noticed the following:    USBH_HID_SetProtocol(phost, 0U); generates a SET_PROTOCOL request with wValue = 0x0001  (Report Protocol)whereas:    USBH_HID_SetProtocol(phost, 1U); generates wValue = 0x0000  (Boot Protocol).because this implementation:if (protocol){ phost->Control.setup.b.wValue.w = 0U;}else{ phost->Control.setup.b.wValue.w = 1U;}In other words, the protocol parameter passed to USBH_HID_SetProtocol() is inverted with respect to the value actually transmitted in the USB SET_PROTOCOL request URB.I noticed that the same implementation is still present in STM32F2 HAL v1.9.6.I am not sayi

On STM32F7 OTG_HS with an external ULPI PHY, is there a supported way for firmware to issue an ULPI Extended Register Read/Write transaction?The required ULPI sequences are:Extended read:    TX CMD 0xEF     extended address byte     read returned dataExtended write:    TX CMD 0xAF     extended address byte     data byteThe undocumented PHYCR viewport at USB_OTG_HS + 0x34 used by STM32CubeF7 only appears to support ordinary single register accesses. Can PHYCR issue an extended ULPI transaction?Thanks,Alex

Hello, In my STM32WBA65 + FreeRTOS project that I work on in VSCode, with the STM32CubeIDE for VScode extension, I came accross a rather strange and annoying behaviour:It seems that when we enable liveWatch in our debug configuation in .vscode/launch.json, the breakpoints are still active after the debug session ends. My minimal debug configuration:{ "type": "stlinkgdbtarget", "request": "launch", "name": "Build+Prog+Debug", "origin": "snippet", "cwd": "${workspaceFolder}", "preBuild": "${command:st-stm32-ide-debug-launch.build}", "imagesAndSymbols": [ { "imageFileName": "${command:st-stm32-ide-debug-launch.get-projects-binary-from-context1}" } ], "liveWatch": { "enabled": true, "samplesPerSecond": "4" }, } I have the same behaviour with a hot-attach debug configuration if it has liveWatch enabled.Here is how I test:In one thread, I have code that reacts to two external stimuli lets call them S1 and S2 (in my case it's characters sent to the target on the

Hi,I try to follow the instruction from this link to compile the “device-tree” again. First of all, the 3 primary components (FLASH- SOURCE- and SDK-x86 ...) are extracted under the WORKDIR, together with MyDeviceTree generated from the STMCubeMX. Next, the dedicated variables EXTDT_DIR, FWDDR_DIR, FIP_DEPLOYDIR_ROOT are set-up.I did also run the SDK environment to prepare for the next steps.Regarding “unpack and patch sources”, I follow the instruction line by line and did successfully.Then for the “regenerate the kernel DTB”, I got stuck at the line “make” the “.dtb” files. For this line, I changed the command as follow:MY_DEMO → MP15 (which is my project name) /linux → /kernel (since I couldn’t find the sub-dir “linux” in the DeviceTree directory) stm32mp135f → stm32mp157d -my_demo- → mp15→ Hence the file stm32mp135f-my_demo-mx.dtb will become stm32mp157d-mp15-mx.dtb, which matched with the stm32mp157d-mp15-mx.dts from the ../kernel directory.However I got the following errors and d

I am working with an STM32MP257F-EV1 Evaluation Board (board reference MB1936, target device STM32MP257FAI3) and am trying to debug a standalone bare-metal application running on the Cortex-M33 core directly over SWD using ST-Link.Current SetupBoard: STM32MP257F-EV1 Board reference: MB1936 Target: STM32MP257FAI3 Tools: STM32CubeIDE and STM32CubeProgrammer Boot configuration (SW1): Development boot Boot0 = 1 Boot1 = 1 Boot2 = 0 Boot3 = 0 JP3: No jumper fitted (STLINK-V3EC active) CubeIDE Debug Configuration: Load Mode = "thru JTAG/SWD link (Engineering mode)" Access Port = "8 - Cortex-M33" Debug interface = SWD I have also attached a screenshot of the debug error I am receiving.Current ObservationI am able to debug the Cortex-M33 successfully when the board is first booted from an SD card. After the SD-card boot completes, I can connect to and debug the M33 core from CubeIDE.However, my requirement is to debug the M33 without booting the board from an SD card, eMMC, or QSPI.Specif

Hi,how do I start the USB DFU Bootloader with a STM32C071 Nucleo? I tried it while putting Boot0 to high and pressing reset or do a power cycle but the STM32 DFU does not show up in the device manager. I connected USB to the NUCLEO extra USB port of the C071. I tried with another board (F2 MCU) where it worked well to prove that the drivers are installed. BRMatthias