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Hi, the extension version is 3.8.0, and it usually takes 5min to load, is that normal? Also, is there any CDN or dedicated server for Chinese users? cuz it's troublesome to download those bundles here. Thx

When I'm done compiling, the memory details show"FLASH";"0x08000000";"";"64 KB" ".ITCMSection";"0x00000000";"0x080002a0";"1.36 KB" ".isr_vector";"0x08000000";"0x08000000";"672 B" ".text";"0x08000810";"0x08000810";"29.19 KB" ".rodata";"0x08007cd0";"0x08007cd0";"84 B" ".ARM";"0x08007d24";"0x08007d24";"8 B" ".init_array";"0x08007d2c";"0x08007d2c";"4 B" ".fini_array";"0x08007d30";"0x08007d30";"4 B" ".data";"0x20000000";"0x08007d34";"144 B" ".bss";"0x20000090";"0x08007dc4";"868 B" "RW_NONCACHEABLE";"0x200003f4";"0x08007dc4";"36 B" "._user_heap_stack";"0x20000418";"0x08007dc4";"190.98 KB"All sections from .bss on should NOT be in FLASH. The linker script has /* Used by the startup to initialize data */ _sidata = LOADADDR(.data); /* Initialized data sections into "RAM" Ram type memory */ .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ *(.data) /* .data sections */ *(.data*) /* .data* sections */ *(.RamFunc) /* .RamFunc sections */ *(.RamFunc*) /* .Ram

Hello everyone. I read that V8 will become available for OEM in Q1, but is there any estimations when V8 will become available for independent engineers or maybe even NUCLEO V8 will be released?

Hi all, i search properties for manage showed multinumber counters without not cool moving.For example num 123 121 111 . Align not help here .My idea is mark textarea as number aligned and render calculate widths from font for 0-9 and use it to convert showing as monospaced . Ofcourse font editor can change this , but better is switchable choice. Exist or is this doable in an TGFX version?

We have some devices based on STM32MP257 SoCs that connect to a 100 Mbit Ethernet network via ETH1, where ETH1 is going straight to an RMII PHY. Pins for ETH2 are reserved, but are not used/not connected. Some of our devices work rock-solid as excepted, but others exhibit massive performance problems on the Ethernet connection.After lots of research, we think that our devices are affected by a silicon bug described in errata sheet ES ES0598 as "ETH1 RMII mode could have CRC errors". Our chip revisions are all rev Y, which are affected by the issue. The errata says that ETH1 should be routed through ETHSW to work around the silicon bug. To test if the workaround works for our case, I've tried to enable ETHSW, but failed so far because STM32CubeMX forces me to free some pins before it allows me to enable ETHSW in RMII mode. It seems like ETH1 and ETH3 must be used together if ETHSW is enabled, the pins for ETH3, however, are already used for other hardware functions.So, my goal is to- en

I'm back, and working with the stm32g070rb chip. I did prototyping on a nucleo board based on the same chip (split the st link and nucleo board), and wired the ST Link to the microcontroller with the following connections I used open-ocd for flashing code to the nucleo, and it worked flawlessly. Based on the wiring, I made the assumption that this'd translate directly when developing the PCB.   (picture of the PCB and the schematic) When I tried to make the same connections, and tried to flash, I'd get the following issue   ```bash Info : auto-selecting first available session transport "hla_swd". To override use 'transport select <transport>'.Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWDInfo : clock speed 2000 kHzInfo : STLINK V2J31M21 (API v2) VID:PID 0483:374BInfo : Target voltage: 0.018873Error: target voltage may be too low for reliable debuggingError: init mode failed (unable to connect to

There is official errata named "2.5.6 Indirect write mode limited to 256 Mbytes" where indirect OSPI write requests for addr >256MB are written to invalid target address. I tested the behavior and it seems address is effectively truncated to 28bits. Contrary to what errata says, I can see the same truncated address also for indirect reads.From what I see the problem is affecting NORs only because NAND uses page addressing in 0x13/0x10 cmds and these are always smaller than 24bits.Is the assumption correct ?Martin

Hello,I am currently working with the STM32WBA65RI for BLE Direction Finding using connectionless mode. I would like to know if it is possible to use a low-power mode such as Standby with RTC, allowing the board to consume only a few nanoamps, then wake up periodically via the RTC, perform advertising for a defined period, and return to Standby mode.Could anyone provide guidance or share experience with this approach?Best regards.

Hello to whom this might concern,I was recently experimenting with STM32C011J4M for a small hobby project (I am trying to fit into a about coin size) and want to comunnicate with other chip over I2C. Due the size of the package I cannot use debugging to find core of the issue, so I used multimeter and legs 4 to 7 as signal outputs. I let CubeMx to generate signal configuration and try to use PA8 as output signal (overlaping with PA11[PA9]). The resulting behavior is that the physical leg 4 is stuck on 1.2V and output is not detectable. If I leave PA11 set as analog-nopull, but remove PA11 from 'HAL_SYSCFG_SetPinBinding' the output becomes readable. From rading on the other pins, I can see, that the communication doesn't work. The I2C is also on overlaping pins (default generation put the pins on PC14[leg 1] and PB6[leg8], which also overlaps with programming connections). I try to communicate with lp5817 and am wondering, if I should also remove pins PB7, PA14 and PC15 f

Hello, we have designed different boards with STM32G0B1.With our latest board we find that bootloader is not activated at power on, even when Boot0 is high roughly 1ms before MCU power rises (I can provide oscillogram), instead of bootloader, application is started.Of course nBOOT_SEL option is zero. After giving a reset, bootloader is correctly starting.The only difference to other boards might be MCU revision. We have that problem with MCUs marked 'Z'. With 'A' marking every board is working.Are there differences between MCU revisions regarding this?Is there a minimum time Boot0 has to be high before power on?Is reset required to activate bootloader (i.e. is it not guaranteed to start after power on? if yes, what are the differences between reset and power on, respectively where are they documented)?I did not find answers to the above in your documentation.Thank you in advance 

Hi,On a custom board I get the following message: Unable to detect DBGMCU Mailbox STwhen i run regression.bat.I did several test (provisionning, regression) before and i didn't notice any issuesDA with password and TZ disabledA program is running on my custom board but i cannot come back to OPEN state with the regression script.I tried with HRST wired to my STLINK with no success ...Any ideas ?Regards

The FSBL → Application jump is working fine, and the application is running properly from external flash.However, I am facing the following issues:Ethernet IssueEthernet initialization is successfulPHY link is UP, but speed is 10 Mbps (Full Duplex)Ping is not workingEthernet TX is failing continuouslyNo UDP data transmissionCamera IssueCamera (IMX335) is detected over I2CInitialization is successfulStreaming is startedBut no frame data is received (first frame timeout)Support RequiredHow to fix Ethernet bring-up (speed, ping, TX issue)Any example/project for Ethernet + UDP communicationGuidance for CSI/DCMIPP camera interface and how to read frame dataThe suggested VENC_RTSP_Server example contains only initialization; full configuration and setup details are not clear & .ioc also missingThese issues are blocking further progress. Kindly provide guidance or reference examples.

Product:MCU/SoC: STM32MP2Description:In our ST Linux environment, the hantro-vpu driver registers:/dev/video5 -> VDEC (H.264/VP8 Decoder)/dev/video6 -> VENC (H.264/VP8 Encoder) We want to implement direct V4L2 API usage for H.264/VP8 encoding and decoding, without using GStreamer.Specific Questions: Are there official minimal examples or demos using pure V4L2 API for H.264 / VP8 encoding/decoding?DMA Usage: Is it possible to use DMA for input/output buffers in V4L2 mem2mem mode on STM32MP2 Hantro VPU? If yes, what is the recommended configuration and constraints? 

I am struggling with the keys in the new V1.5.0 LBM stack. Keys are read from NFC EEPROM and device is joining. After joining, I expect the stack to save the join and session keys in secure memory so the keys are deleted in EEPROM for security. After reset, the device does not join. How must this be handled.

I've noticed, that the new STM32C5xx family is not present in the STM32_open_pin_data repo. I know why (MX2 vs MX), but ST, please, keep updating this repo with the new families' data. It's a valuable database for third party tools used to allocate pins in various STM32 designs. Thanks, JW

Hi everyone,For my current project, I am working with an STM32WB55RGV. I am using all 256 KB of its RAM and running the ADC1 at a sample rate of 5.8 MSPS with 8-bit resolution.I am looking to migrate to a newer STM32 family that provides equivalent (or more) RAM and supports this high ADC performance. I plan to order some standalone chips and devkits for prototyping. Compact devkits would be a huge plus.During my research, I found the STM32H523CCT6 chip and the NUCLEO-H533RE devkit at a good price. Do you think this is the best choice for my needs? Also, are there other "mini" devkit options (like the Nucleo-32) that come with a large amount of RAM?Thanks in advance!

Hello,   I may have found a bug related to the STM32C092GCU6 MCU and the FDCAN peripheral.   I created a new project and experienced issues with FDCAN reception: no RX messages were received, and the callback HAL_FDCAN_RxFifo0Callback() was never triggered.  After several days of troubleshooting, I discovered a possible mismatch between the startup file and the generated interrupt handler names.  In startup_stm32c092gcux.s, the following interrupt vectors are defined:  .word FDCAN_IT0_IRQHandler /* FDCAN global interrupt 0 */ .word FDCAN_IT1_IRQHandler /* FDCAN global interrupt 1 */   However, when generating code with STM32CubeMX, the following interrupt handlers are created in stm32c0xx_it.c:  void FDCAN1_IT0_IRQHandler(void) { HAL_FDCAN_IRQHandler(&hfdcan1); } void FDCAN1_IT1_IRQHandler(void) { HAL_FDCAN_IRQHandler(&hfdcan1); }   As a result, the startup file expects FDCAN_IT0_IRQHandler / FDCAN_IT1_IRQHandler, but the gen

Hello. I'm working on a BLE  application that uses an STM WBA55 board and ThreadX. It was based on the St Threadx p2pServer example, The Sequencer is disabled. I'm using stmCubeIDE 1.19 and st_fw1.7 and i cannot migrate to new versions due to compatibility reasons.The main idea for the application is that the board initializes, advertizes 10-20 seconds for a connection, connects to a device like a phone pc, gets data from a sensor and transfers the data to the connected device. If no connection occurs or if the device is disconnected it should go into sleep/stop/standby mode until an EXTI interrupt from the user button is triggered. As of now the application is structured as follows:-- A main thread is in charge of initializing the rest of the threads (one thread for each type of sensor eg temp adc etc) and handle events like ble connection/disconnection and sleep/wake up requests.--Upon a sleep request a flag is set into an appropriate value. The rest of the threads inc

Hi I am trying to figure out these VCAP conections.From the datasheet I could look like they are internally connected together, for this reason could avoid routing these three pads together on my board.Can anybody confirm that is the case?Thank you.

My code is as follows. volatile uint8_t d_deadcode = 0U; void sleepManagement(void) { if ((isIgnActive(IGN_1, getGpioInput(GPIO_IN_IGN_1))) || (isIgnActive(IGN_2, getGpioInput(GPIO_IN_IGN_2)))) { return; /* ign sig exist */ } if (isSleepSync()) { sleepEntryHandler(); d_deadcode = 1U; } else { updateDateOld(); requestSleepSync(); } } static void sleepEntryHandler(void) { uint32_t rtcWakeup; irqIsrDisable(); deinitApp(); if (ignOff1hrElapsed.state == OFF) { rtcWakeup = TIME_IGN_OFF_LOAD_60MIN - ignOff1hrElapsed.onTimer; startRtc(rtcWakeup); } startWkpu(); enterStandby0(); } void enterStandby0(void) { /* * PD0(8KB): always retained, not programmable * PD1(32KB): always lost in STANDBY0, not programmable * PD2(56KB): retain in STANDBY0 */ MC_PCU.PCONF2.B.STBY0 = ON; if (SPCSetRunMode(SPC5_RUNMODE_STANDBY0) == CLOCK_FAILED) { SPC5_CLOCK_FAILURE_HOOK(); } }​I expected that when the device enters sleep mode and is woken up by the WKPU, a res

Dear ST Community,I recently bought the SPC582B-DIS board in order to test the EV-VNF1248F board. I installed the VNF1248 Evaluation board GUI and the UDE STK 2021 by following VNF user guide.I downloaded the Chorus1M_VNF1248_discovery.elf in order to test the board, I flashed it with this elf file (flash success) but communication is not possible in the GUI with the good COM port  and good serial configuration (error "Cannot found Demo Board! Check USB cable"  in USB FTDI, and no Rx trame in Serial Port)I tried with another computer, same results. I looked in the forum, I have the good PLS driver (Driver USB PLS\JtagUsbDriver), and I installed the stsw-link009, but still not working.I also found another elf file on st community website --> Chorus1M_M09SpiDriver.elf, and with this .elf, I'm able to communicate, I get Rx trame and uC is active, but I get the error "firmware is not fitting with HW type", which seems logical.If I'm not wrong, I (and anothe

Hi Community, I am using STM32H745I-DISCO board and generated a TouchGFX project and attempted to flash/debug from CubeIDE. The flashing process fails during the erase stage. Observed Errors Initially: “Error: failed to erase memory” After enabling external loader (without initialization): Erase still fails After enabling external loader with Initialize = true: “Failed to initialize external memory” “Error in initializing ST-LINK device” In CubeProgrammer: External flash is detected when selecting loader MT25TL01_STM32H745I-DISCO However: Mass erase fails Sector erase also fails Error message: “Sector erase operation has failed… please verify flash protection”  I am using STM32CubeIDE v1.18.1 and STM32CubeProgrammer: v2.16.x I have attached screenshots. Can someone help what could be the issue? Thanks.  

Hello, I am working with the ST67W61 WiFi module and NCP firmware provided in X-CUBE-ST67W61. The firmware flashing process works correctly when using the reference setup: NUCLEO-U575ZI-Q X-NUCLEO-67W61M1 expansion board However, the same flashing procedure fails on our custom board, which is designed based on the X-NUCLEO-67W61M1 schematics. Issue observed:During NCP flashing over UART, the process fails at handshake stage with the following error: "ack is b''" "CHIP IMG LOAD SHAKEHAND FAIL" Observations: UART communication appears inactive (no response from module) Same firmware and flashing tool used Same COM port configuration verified Power supply is stable (3.3V confirmed) Issue is reproducible consistently on custom board Connections replicated from reference design: CN6: 3V3, 5V, GND CN5: SPI (CLK, MOSI, MISO, CS) CN9: BOOT, CHIP_EN, SPI_RDY, UART TX/RX Suspected area:We suspect the issue may be related to: BOOT pin configuration during reset CHIP_EN / RESET sequencing

Hi all !I'm trying to write a driver for a LevelX system to talk to a QSPI chip over the OCTOSPI1 peripheral (STM32H563). I got the chip to respond to most commands, set it up in reading / protected mode.But, later, I've spotted an issue : I cannot sent over DMA two buffer, one after the other (as I did, two call to the Transmit_DMA function). Or, the LevelX API provide me two buffer, that may not be contigous. That's the issue, how to do ?I reminded that this chip has Linked List functionnality, which does match what I want (two DMA transfer from / to two different memory space, but, within one frame (Only one NCS being low).And, I cannot find a way to make them work...From a general perspective, the code is build like that :    if (xfer_size > GD25_DMA_THRESHOLD) {         /*          * Clean the semaphore, to ensure we restart from 0.          */         while (tx_semaphore_get(&

Hi, I changed the location of the main.c file in my disk then reimported it in the project explorer as a linked file under the same path (under core/src). When I modify the .ioc file, save it and regerated the code, the changes of the peripheral configuration are not reflected in the linked main.c file. I opended the project directory (on disk) to investigate and saw that a new main.c is generated and the changes are reflected there. What is the solution that makes the generated code from the .ioc be integrated in the linked main.c and not generated a new main.c?