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For example, if I edit the ‘Synchronous Predivider’ value for the STM32F030 RTC: Then, say, click on TIM1: Then go click back to the RTC view: My edit is gone! I’ve also been caught-out with this on UART baudrate.I suspect it applies to any numeric-entry field. This should, at least, ask if I want to lose edits. On Win11-Pro.

I wish to get a better understanding of how the TNR works. The precision figures given in the DS are with the TNR enabled. What is not clear from this is what impact it has on the frequncy response of the sensor. So, suppose I have a linear actuator moving sinusoidally at 3Hz over a few mm radially to the sensor, will this be picked up cleanly without attentuation with the TNR enabled or would I need to disable it? I can operate the sensor at 30fps up to 100fps for data capture. thanks    

This morning I got this notification, for a post it says was “1 hour ago”: But it links to this post - which is 4 days old:  I think I’ve seen this before.

I typed up a reply, all text, and hit submit. Then a message pops up saying Something’s gone wrong and my entire message is erased. No indication as to what happened. I’m logged in normally, nothing special going on from my side. Guess I have to copy my message to clipboard before hitting send. 

Hi,I am currently using ST’s OpenSTLinux distribution, version 6.2.1, for our STM32MP135F-based custom board.My objective is to customize the boot and operating system components—TF-A, OP-TEE, U-Boot, and the Linux kernel—to meet our board-specific requirements. Boot media is emmc.I have successfully set up the Yocto build environment and can build the complete image. However, to reduce development and debugging time, I would like to build these components individually rather than rebuilding the entire image after every change.I have also set up the environment for building and installing these boot artifacts separately. I would appreciate your guidance on the correct build and deployment sequence, including which source files, configuration files, device trees, and generated binaries are required at each stage.Could you please clarify the recommended workflow for building, integrating, and flashing TF-A, OP-TEE, U-Boot, and Linux independently while ensuring compatibility with ST’s Op

Hi all,My MX_SDMMC1_SD_Init() is failing and dropping into Error_Handler() on a custom STM32U575RGT6 board.I traced it down to SD_PowerON() failing — it returns HAL_SD_ERROR_UNSUPPORTED_FEATURE. Digging deeper, this happens because one of the internal response-check calls (SDMMC_GetCmdResp1() / GetCmdResp2() / GetCmdResp3()) is returning SDMMC_ERROR_CMD_RSP_TIMEOUT (the CTIMEOUT flag gets set) — basically the card isn't responding to one of the commands sent during power-on/init.i have checked HAL_SD_InitCard() clock divider formula where  HAL correctly computes ClockDiv = 21 for 16 MHz kernel clock also measured SDMMC_CK on oscilloscope and getting 381.7 kHz which is within spec (≤400 kHz)we have external pull ups at all pins of sdmmc plus when i run on this fun SDMMC_CmdAppCommand i can see activity on CMD line but i didnt get any response on that line.the clock i’m giving is HSE PLL1P to SDMMC clock mux which is 16Mhz final  

I previously experimented with performing the FTM Demo (Firmware Upgrade) in ST25PC-NFC on an ST25DV Discovery board, using both the STEVAL-25R3916B and FEIG MR102 readers. The demo worked successfully with both readers, although there was some difference in transfer speed. We are now looking to implement OTA firmware updates on our NFC-enabled product, which is based on a PIC microcontroller. We have integrated the ST middleware into our application and are currently testing the firmware upgrade functionality using FTM. The firmware upgrade works correctly when using the STEVAL-25R3916B reader. I have attached the relevant logs below. However, when using the FEIG MR102 reader, the firmware upgrade does not work correctly. After comparing the ST logs, it appears that there is a difference in the timing and behaviour of the writeMsg calls between the two readers. With the FEIG MR102: The first packet is always transferred successfully. Almost all subsequent packets require a second at

Hi, I am wondering if anyone has had any experience using the STM32N6 onboard H264 encoder? I am trying to write a business case for using this MCU, which claims it can broadcast H264 video at 720p & Audio at a stable 30fps over LAN without any noticeable drops in performance? The only solutions I have found so far have been dedicated SoC.

Hello ST Community,I am working with the STM32U535RET6 and need clarification on the interaction between the IWDG Window feature and Early Wake-up Interrupt (EWI).I tested the following configurations:1. Window enabled, EWI disabledThe Window feature works as expected:Early refresh → IWDG reset Late/no refresh → IWDG reset2. EWI enabled, Window disabledWhen only EWI is enabled, the EWI interrupt occurs when the counter reaches the configured EWIT value.In the ISR, the HAL code acknowledges the EWI by setting EWIC.According to RM0456, writing EWIC = 1 clears EWIF and also reloads the IWDG counter with RL[11:0].However, in my observation, the EWI ISR is called only once, and I do not observe the expected counter reload after the EWI acknowledgement.3. EWI and Window enabled togetherWhen both features are enabled, I observe different behavior.For example, with EWI configured for approximately 2 seconds, the EWI occurs repeatedly at approximately every 2 seconds. The IWDG counter appears t

I was wondering, despite the 10-year longevity commitment cited on the page of the STM32G0 microcontroller, the STM32G0B0VET6 has basically no more supply worldwide and lead time of more than a year.Is there a reason for that? Should I move to a more “available” microcontroller?

In our Project CAN communication isestablished via CANtrcv TJA1145, the INH is triggering the wakeup to L99ASC03, then the watchdog present in L99 is triggering to switchof MCU so I need to control the Watchdog via SPI by writing the value to its register as in L99ASC03 Datasheet shown below, could you please support how shall I implement this to send via SPI.​​​​​ 

Among 20-odd PCBs populated with STM32G431CBUx controller, I am facing issue in programming one of them. All the others works fine, with no issues what so ever.The RDP is set to 0xFF, and the BOOT_LOCK bit was set. I searched through the community posts and tried the following methods.Set the BOOT0 pin High and enter through “Under Reset” mode → try to reprogram RDP to 0xAA. Try resetting through NRST and then reprogram the option bytes15:42:24 : ST-LINK SN : 0670FF56494889776713344115:42:24 : ST-LINK FW : V2J33M2515:42:24 : Board : NUCLEO-F303RE15:42:24 : Voltage : 3.25V15:42:25 : SWD freq : 4000 KHz15:42:25 : Connect mode: Under Reset15:42:25 : Reset mode : Hardware reset15:42:25 : Device ID : 0x46815:42:25 : Revision ID : Rev X15:42:25 : Debug in Low Power mode is not supported for this device.15:42:25 : UPLOADING OPTION BYTES DATA ...15:42:25 : Bank : 0x0015:42:25 : Address : 0x40022020 15:42:25 : Size : 84 Bytes15:42:25 : UPLOADING .

Hello everyone,While reviewing the STM32F302x6/x8 documents (DS9896 Rev 8 and RM0365 Rev 8), I found some inconsistencies in the memory map. Could you please look into them?DS9896 Rev 8, Table 19, page 49TIM1 is 0x4001 0800 - 0x4001 2FFF (10 K). It should be 0x4001 2C00 - 0x4001 2FFF (1 K). RM0365 shows TIM1 at 0x4001 2C00 - 0x4001 2FFF (1 K) and the range 0x4001 0800 - 0x4001 2BFF as reserved. It looks like the reserved area is inside the TIM1 row. The CMSIS device header also confirms the start address 0x4001 2C00: #define TIM1_BASE (APB2PERIPH_BASE + 0x00002C00UL) (file: stm32f302x8.h).DS9896 Rev 8, Table 19, page 50I2C3 0x4000 7800 - 0x4000 7BFF has size 9 K. It should be 1 K. RM0365 also says 1 K. Reserved 0x0804 0000 - 0x1FFF D7FF should start at 0x0801 0000. Main Flash is 64 K and ends at 0x0800 FFFF, and RM0365 shows 0x0801 0000 - 0x1FFF D7FF. Typo: 0x2000 4000 - 3FFF FFFF should be 0x2000 4000 - 0x3FFF FFFF.DS9896 Rev 8, Table 19, page 51 Reserved 0x0004 0000 - 0x07FF FFFF sho

Help, how do I perform flashing only without debugging when using STM32CubeIDE for VS Code? I have reviewed previous posts, but the most recent Q&A on this issue seems to be from a year ago, and the methods mentioned there appear to be outdated. I am not sure how to achieve this functionality in the latest version.

Hello everyone, I would like to ask if it is possible (and if so, how) to make both m4 and m7 get an interrupt made by the user button in in the nucleo board, since the only Pin Context Assignment options on CubeMX is either m4 or m7. Do I have to do it "manually" by writing the code to register the interrupt on the other mcu? Thanks in advance!

hi,In STM32G070C, it seems there is no remap mechanism to select wich pin(PC5,or PC11) should be used for USART3_RX.if i configure PC5 and PC11 are USART3_RX all at once, simultaneously, what will happen?Best regards  

 NUCLEO-H753ZI Board Recovery Case Description: STMicroelectronics ST-LINK GDB server. Version 7.11.0Copyright (c) 2025, STMicroelectronics. All rights reserved. Starting server with the following options:Persistent Mode : DisabledLogging Level : 1Listen Port Number : 61234Status Refresh Delay : 15sVerbose Mode : DisabledSWD Debug : EnabledInitWhile : Enabled Target no device found Error in initializing ST-LINK device.Reason: No device found on target.  Board: NUCLEO-H753ZIBoard part number: MB1364-H753ZI-E01MCU: STM32H753ZIT6 / STM32H753ZIAffected quantity: 3 boards  I have three NUCLEO-H753ZI boards, model MB1364-H753ZI-E01, with the same hardware issue. On all three boards, U2 (5V ST-LINK protection IC) becomes significantly hot when the board is powered through the USB connector, and LD6 (ST-LINK USB overcurrent indicator) blinks red. "Error in initializing ST-LINK device."I checked the board and found that 5V is present at the input of U2, but the output toward the ST-LINK section

Hello everyone,I'm developing an application using the STM32H563 with TrustZone enabled. Online tutorials first show configuring the fuse bits using the STMCubeProgrammer software:TZENSECWM1_STRTSECWM1_ENDSECWM2_STRTSECWM2_ENDThen, the application is installed in the STMCubeIDE, where it is saved and executed correctly.However, if the developer tries to install the application without going through the first step, the code is unable to exit the safe zone, resulting in a hard fault error. This is because the IDE, when TrustZone is enabled, assumes that all FLASH memory is in the safe zone.I would like to change these fuse bits without using STMCubeProgrammer. I believe it's possible, but I haven't found any information where the result is satisfactory. Could someone help me?

Hi all, I’m searching a method to configure the NVRAM STPMIC25 VINOK_rise param in the 0x90 adress Register (NVM_MAIN_CTRL_ SHR1) As this is a sensitive reg I’m supposing this field and may others are Locked in the NRAM in the DK board from ST. Please I’m considering running Board with 3.3V power Buck Converters. Cheers, Habib 

Hi,I am using the STM32H7S7L8H6H microcontroller paired with the APS256XXN-OBx9 PSRAM, configured for two main purposes: Framebuffer for TouchGFX. (320*240 16bpp dual frame buffer). Heap region for FreeRTOS (heap_5.c), as my application is large and combining SRAM3 with DTCM leads to full SRAM To follow ST's recommendations for TouchGFX, I configured the MPU without caching for the PSRAM region. However, this causes the FreeRTOS heap located in that same region to be non-cached, resulting in significantly slower performance.I attempted to divide the PSRAM into two separate MPU zones (one cached for the heap and one non-cached for the framebuffer), but doing so introduced graphical glitches on the screen.Do you have any recommendations or best practices to mitigate this issue and achieve both good heap performance and stable display output?Thanks  

Board / softwareSTM32N6570-DK (MB1939), STM32N657X0H3Q STM32Cube FW_N6 V1.4.1, ThreadX + USBX from the package (not X-CUBE) STM32CubeIDE, load-and-run development flow (ELF downloaded into internal SRAM by the debugger; no FSBL, no XIP, no external loader) USB2_OTG_HS configured as Host_HS on CN17, internal HS PHY OTGPHY2 clock = RCC_USBPHY2CLKSOURCE_HSE_DIRECT, 24 MHz HSE crystal CPU 600 MHz, AHB 200 MHz USBX: UX_MAX_DEVICES 8, UX_APP_MEM_POOL_SIZE 98304, USBX_MEMORY_STACK_SIZE 65536, only the CDC-ACM class registeredWhat worksA USB 2.0 mass-storage device (HP, VID 0x03F0 / PID 0x2003) enumerates reliably and repeatedly:[usb] idVendor : 0x03F0[usb] idProduct : 0x2003[usb] bcdUSB : 0x0210[usb] bMaxPacketSize0 : 64[usb] speed : HIGH[usb] state : ADDRESSED[usb] -- interface 0 class 0x08 (mass storage) 0x06/0x50[usb] ep 0x81 BULK IN mps 512[usb] ep 0x02 BULK OUT mps 512UX_DEVICE_ENUMERATION_FAILURE here is e

Subject: STM32MP257F-DK - How to get the MPI7001 800x480 HDMI panel working (EDID override gives test patterns, but no stable image/video)SETUP- Board: STM32MP257F-DK- OS: OpenSTLinux (Yocto build), Weston 13.0.1, kernel 6.6.129 (-dirty)- Panel: MPI7001, 7inch HDMI Display-B (800x480)- Display path: LTDC -> DSI host -> ADV7535 (i2c0, 0x3d, adv7511 driver) -> HDMI -> panel- stm_drm and dw_mipi_dsi_stm are built as modules (=m) and loaded via /etc/modules-load.dPROBLEMThe display never shows a stable image or video from the DK board. With the panel attached, and before loading any EDID:    modetest -M stm -c    32  0  disconnected  HDMI-A-1  0x0  0  31      (0 modes)dmesg shows "EDID block 0 is all zeroes", and Weston logs "connector 32 is disconnected" and exits.WHAT WE DID1. Copied the panel's EDID from a PC (cat /sys/class/drm/card1-HDMI-A-2/edid > panel.bin) to /lib/firmware/edid/panel.bin on the board.2. Loaded it on the board:    mount -t debugfs none /sys/kernel/deb

Hello STM32 Community,I am currently working on a USB Flash Drive interface using STM32G0B1RET6 with USB Host and FatFs.The USB Flash Drive is working correctly. When I plug in a USB Pendrive, my STM32 can detect it, mount the filesystem, and successfully create/write files to the Pendrive.Now I would like to display/check the following information:Total USB Flash Drive storage Used storage Free/available storage Detect whether the USB is almost fullMy current code is:static void USBH_UserProcess(USBH_HandleTypeDef *phost, uint8_t id){ switch (id) { case HOST_USER_CLASS_ACTIVE: Appli_state = APPLICATION_READY; USB_Detect_flag = 1; // USB is plugged Mount_USB(); HAL_GPIO_WritePin(GPIOC, LED_RED_Pin, GPIO_PIN_RESET); /* Check USB free space */ if (usb_space_result == FR_OK) { displayText16x16_DMA(20, 190, "USB HAS SPACE",

Hello, I'm developing software for the STM32WBA2. Bonding is a required feature of this project, so I've set the bonding-related parameters as follows: CFG_BONDING_MODE: Bonding mode (0x01)CFG_ENCRYPTION_KEY_SIZE_MAX: 16CFG_ENCRYPTION_KEY_SIZE_MIN: 8CFG_IO_CAPABILITY: Display Yes No (0x01)CFG_MITM_PROTECTION: MITM protection required (0x01)CFG_SC_SUPPORT: Secure Connections Pairing supported but optional (0x01)CFG_KEYPRESS_NOTIFICATION_SUPPORT: Keypress notification not supported (0x00) I've also attached app_conf.h and ble_conf.h.However, when I connect using ST BLE Toolbox and press the Bond button, the Bluetooth connection is lost.What could be the cause?Is it possible to view communication logs using ST BLE Toolbox? Best regards, Gotoda 

We have a project which uses STM32CubeIDE (Eclipsed-based). It has a Makefile which we use to compile the code and upload the code to the target. Since I know ST has made a new STM32CubeIDE VSCode extension, I wanted to have a trial to see if I can convert the existing Eclipsed based project to VSCode based project. I installed the STM32CubeIDE extension in VSCode and other necessary components. I followed the migration guide to generate a CMake project using STM32CubeMX. However, it never worked since the new CMake file doesn’t take what the original Makefile does in my project. It missed a lot of compiler and scripting options. After the migration, the build process failed and never succeeds. Since Makefile works great in the original project (either in CLI/GUI mode), why does the migration require user to convert it to CMake? Many Unix/Linux users prefer Make instead of cmake. It gives you better control over the source code. I would suggest ST that if you really want to make a VSCo