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Hi Can you please tell me where I can find the safety manual for the SR5E1Ex series of micros? Many thanks Paul W.

User labels for handle structure In STM32CubeMX, the user can define a User Label for GPIO pins.For example:  User Label: LED_REDThis generates:#define LED_RED_Pin GPIO_PIN_5#define LED_RED_GPIO_Port GPIOAHowever, there is no User Label option for handle structures.For example:extern I2C_HandleTypeDef hi2c;extern TIM_HandleTypeDef htim2;extern ADC_HandleTypeDef hadc1;extern UART_HandleTypeDef huart1;Is would be nice to have al user label for a uart, so the application source can refer to that user label. For example:extern UART_HandleTypeDef MY_COM_huart;extern TIM_HandleTypeDef LED_RED_htim;Thanks,

Hello ST Team,We are using the VL53L8CX (VL53L8CXV9GC/1) ToF sensor with an NXP i.MX8MP running Linux over I²C.We understand that the VL53L8CX has an internal MCUWe would like to clarify: Does ST provide firmware updates/releases for the VL53L8CX? If yes, how can we obtain the latest compatible firmware? What is the recommended procedure to update/load the sensor firmware from a Linux host? Does ST provide any recommended firmware version-check or firmware update API for production devices? Please provide the recommended procedure, documentation, and any required ST software package/API. Thanks.

Dear Team, We are using the ST8R00WPUR boost converter to step up the input voltage from 5 V to 12 V in one of our designs.We would like to conduct a design review of the attached circuit. Please review the design and share your feedback/comments.Additionally, we noticed that the Junction-to-Board (θJB) thermal resistance data is not provided in the datasheet. We would appreciate it if you could share the Junction-to-Board thermal resistance value, as this information will be helpful for our thermal simulation and analysis. Best RegardsAbhishek

Hello Team,We need clarification regarding OBKey Storage, Internal Trusted Storage (ITS), and Protected Storage (PS) in the STM32H5F5 device when using the Secure Manager framework.Is the OBKey, ITS and PS storage physically located within the device's 4 MB internal Flash memory, or does it reside in a dedicated secure memory region? Can a Non-Secure (NS) application directly read from or write to ITS, OB KEYS, PS storage areas in terms secure manager? If direct access is not allowed, what are the security mechanisms that prevent NS access?Regards,RJ

I have a NUCLEO-F091RC (on-board ST-LINK/V2-1, USB ID 0483:374b, latest firmware V2J33M25). When plugged directly into my Mac it enumerates and drops repeatedly. LD1 keeps blinking red.I found the ST FAQ "Possible communication failure between STLINK-V3 and some recent computers" (eUSB2 repeater interoperability). My symptoms look very similar, but my probe is a V2-1 that enumerates at full speed (12 Mbps), not a V3, so I'd like to know if the V2-1 is affected too.SetupMacBook Pro 14-inch (Nov 2023), Apple M3 Pro, macOS Tahoe 26.7.1 USB-C to Mini-B cable, directly into the MacSymptom (from log stream, repeating about every 0.3 s): enumerated 0x0483/374b/0100 (STM32 STLink / 1) at 12 MbpsAppleUSBIORequest::complete: device 1 (STM32 STLink) endpoint 0x00: status 0xe00002ed (transaction error): 0 bytes transferredAppleUSBHostPort::terminateDevice: destroying 0x0483/374b/0100 (STM32 STLink): hardware connection lostioreg -p IOUSB -w0 shows a new STM32 STLink entry with a different id every

I want to have asynchronous USB audio with the STM32g431k6 and an external DAC but I get conflict message if need both. Am i missing something? if i use OSC IN as audio clock input it will not bypass the internall PLL as in I2S_CKIN isn’t it? I thought it was due to the product used (32pins) but with the 48 is the same. So the question is how do i do that?

Whenever I generate the code for the example, the file hrs_app.c gets truncated to about 5K. This cases some warnings. If I copy the file from the example area to the care generated by CubeMX, it is 8K and the warnings are not issued.Is this a problem with CubeMX or is it operator error?

Does anyone know whether STM32U585 contains a die shield?

Hello everyone,I am experiencing an issue with the FreeRTOS Kernel Awareness view in STM32CubeIDE, specifically regarding the task runtime statistics. The plugin seems to be failing to parse or display the correct runtime percentages, showing almost all tasks permanently stuck at 1% or <1%.My Setup & Recent Changes: MCU: STM32G474 IDE: STM32CubeIDE v2.2.0 Previous RTOS: FreeRTOS V10.3.1 (Generated via STM32CubeMX with the CMSIS-RTOS v2 wrapper) Current RTOS: FreeRTOS V11.3.0 (Added manually via the ARM software pack, bypassing CubeMX generation) The Problem: I recently migrated my project to native FreeRTOS V11.3.0. I removed the old CubeMX-generated middleware and integrated the new version using the ARM pack. I also configured everything required for runtime statistics to function properly (setting configGENERATE_RUN_TIME_STATS, configuring the hardware timer via portCONFIGURE_TIMER_FOR_RUN_TIME_STATS(), and setting up portGET_RUN_TIME_COUNTER_VALUE()).While the project

We are studying the STDES-DABBIDIR 25 kW bidirectional DAB reference design (UM3198 Rev 2, TN1435, schematic and BOM v2.0) for a 30 kW EV charger power module. Two items in the documentation are not publicly available:1. A2H6M12W3-F: UM3198 uses two of these ACEPACK 2 half-bridge modules on the low-voltage side, but st.com has no product page or datasheet for this part. Has it been released? If not, what is the recommended production equivalent?2. Frenetic transformer, design reference 32011-04 (turns ratio 1.78, five stacked E80/38/20 cores), and the 28.6 uH auxiliary inductor: can ST share a specification or drawing, or should we request these directly from Frenetic?Thank you for any pointers.

Dear ST Community,I am currently testing the position control functionality using the following API: MC_ProgramPositionCommandMotor1(target, duration_s);I would like to clarify the behavior of the duration parameter. Does this parameter define only the expected movement duration, or does the position control algorithm also ensure that the motor reaches the specified target position within that duration?I am testing a case where the target position is intentionally very large: float actual = MC_GetCurrentPosition1();float commanded_target = actual + 10000;MC_ProgramPositionCommandMotor1(commanded_target, 2.0f);In this case, completing a 10000-radian movement within 2 seconds is physically unrealistic for my motor.I am monitoring the control status using the following code: uint32_t start = HAL_GetTick();printf("ms (planned %ld ms)\r\n", (long)(MC_GetMoveDuration1() * 1000));while (1){ if (HAL_GetTick() - start < 10000) { printf("Control status : %d state : %d Fault

Hello everyone,I am designing a board using an STM32U5 / STM32H5 microcontroller and I have a question regarding the power supply architecture, specifically concerning the independent voltage domains.My Scenario:Main VDD: 3.3V (required for correct USB functionality/transceiver management via VDDUSB). VDDIO2: 1.8V (supplied independently to interface with low-voltage external peripherals). The Issue:According to the reference manuals and datasheets, there are specific power-up and power-down sequencing requirements, as well as constraints on the voltage levels between different domains (e.g., VDDIOx vs VDD).Is it fully supported to run VDD / VDDUSB at 3.3V while simultaneously running an OCTOSPI/HyperBus at 1.8V?Thanks in advance for your help!

Hi  I am using a custom board to run a stm32h743 with a ov5640 camera. There is external ram fitted, the camera sets up correctly using i2c, and i can run the captureHAL_DCMI_Start_DMA(&hdcmi,DCMI_MODE_SNAPSHOT,(uint32_t)pFrameBuffer, (512 * 1024) / 4); However what i am getting in the buffer is just repeated garbage.  is there any help you can give or at least something to look at.  

I can view the variables concerned either in Watch and Live Watch window, but i have no way to edit them. In Watch window, double-click only allows me to edit the expression instead of its value. VScode document says I can edit variable value in “Variable” window, but i can’t see global variales there.

Hello,I've looked at X-CUBE-PQC (ML-KEM, ML-DSA, LMS/XMSS verification) and the recently announced ST54M with its PQC accelerator. Two things I couldn't find answers to:X-CUBE-PQC currently targets the STM32H563. Are other STM32 families planned? Is the implementation hardened against side-channel attacks, or is it intended for unprotected use? Does ST plan hardware acceleration for ML-KEM/ML-DSA (NTT, Keccak) in future STM32 parts, like the SHA-3 accelerator in Stellar or the ST54M engine? If so, which families, broadly?I understand roadmap details may not be public, so "under consideration" or a pointer to the right contact would already help. Thanks!

Hi everyone,I am working on a three-phase BLDC motor control application using the following components:MOSFET: STL90N6F7 Gate Driver IC: DRV8334 Microcontroller: STM32G431RBT3 DC Bus Voltage: 24 VDC Motor Speed: 60,000–70,000 RPM Measured Peak load Current: Approximately 5 AThe motor is operating normally; however, when running at higher speeds (approximately 60,000–70,000 RPM), the MOSFET package surface temperature rises to around 60°C.Considering that the DC bus voltage is 24 V and the measured peak input current is approximately 5 A, I would like to understand why the MOSFETs are experiencing this level of heating at high RPM.Could the heating be caused by switching losses, gate-drive voltage, dead-time settings, PWM frequency, reverse-recovery losses, PCB layout, or other factors associated with high-speed motor operation?I would appreciate any suggestions on how to identify the root cause and reduce the MOSFET temperature. If anyone has encountered a similar issue with the DRV83

I'm working on an STM32H743-based project driving a parallel LCD through LTDC, with the framebuffer sitting in external SDRAM via FMC. I keep running into intermittent display corruption that I suspect is cache-related, since the M7 core has D-Cache enabled by default.What's the recommended approach for setting up the MPU region for the framebuffer — mark the whole SDRAM region as non-cacheable, or is it better to keep caching enabled and handle cache maintenance manually (SCB_CleanDCache_by_Addr) around framebuffer writes? Curious what's worked best for people running LTDC + SDRAM at higher resolutions/refresh rates without a performance hit.

I would like to report a possible formatting issue in the STM32G491xC/xE datasheet, DS13122 Rev. 4, under the "Embedded SRAM" section. The datasheet currently states:"16 Kbytes mapped at address 0x20001 4000 (SRAM2)." I believe the intended address is:0x2001 4000or0x20014000 This appears to be consistent with the documented SRAM1 configuration:SRAM1: 80 Kbytes starting at 0x20000000 80 Kbytes = 0x14000 bytes 0x20000000 + 0x14000 = 0x20014000 Therefore, SRAM2 would begin at 0x20014000.Could you guys please confirm whether this is a formatting/documentation error and consider correcting it in a future revision of the datasheet?I have attached a screenshot showing the relevant section.

Hello ST Team,We have a custom STM32N657Z0H3Q board on which BOOT1 is routed to PN10 instead of the default PA6.To configure the Boot ROM to sample BOOT1 from PN10, we programmed OTP Word 19 (BOOTROM_CONFIG_10) as described in RM0486 Rev. 4, Section 5, Table 18:dev_boot_port [24:21] = 9 → Bank N (PN) → 9 << 21 = 0x01200000 dev_boot_pin [28:25] = 10 → Pin 10 → 10 << 25 = 0x14000000 OTP19 = 0x15200000Steps FollowedBefore programming, we read OTP through SWD. OTP19 was 0x00000000, with status 0x00000000, indicating that it was unprogrammed and not write-locked. SWD/ST-LINK access was working normally. We programmed OTP19 with 0x15200000 using STM32CubeProgrammer v2.23.0, without enabling the lock option. The tool reported: "OTP words programming done successfully"   After the next power cycle/reboot, the device no longer enters Development Boot. Instead, it boots from Flash, and our FSBL and application start running normally. SWD/debug access is no longer available.Same

Hi all:I have an STM32F407 as main platform, as well as other types like STM32G0B1 and STM32F072, and I am trying to implement a robust SPI master for all of them.I want to reliably detect the end of frame in order to toggle the Chip Select line, but it is well known that the BSY flag is unusable for that purpose:STM32 gotchas68. SPI_SR.BSY is unusablehttp://www.efton.sk/STM32/gotcha/g68.htmlThe hardware NSS output, if available on the particular SPI, would fix the problem, but I have several SPI slaves, so that wouldn't work, would it? Or is there a way to check what the NSS output would be without sacrificing a pin?The recommendation is to use RXNE instead ob BSY, even if you are only transmitting and do not care about the received data.The idea is that, as soon as RXNE is set, the SPI frame has ended, as the last clock edge is what allows the master to finish reading the data from the slave, right?After RXNE is set, I can disable the Chip Select straight away. I could do that even b

Hi,MC SDK 6.4.1, STM32G431, three shunt configuration.I genrated code with workbench with open loop debug.I am able to run ACIM motor in openloop voltage mode.Now, i need to allow overmodulation to utilise 100% VBUS.In MCWB I set DPWM overmodulation flag, generated code and mergerd changes with my actual application code.I am expecting thate PWM waveform should be for DPWM but on CRO i see standard SVPWM.Can anyone help to enable DPWM and utilise VBUS 100% using overmodulation? Thanks & Regards,Ketan Patel 

Hi all,I'd appreciate some help with a BLE range and stability issue. SetupMCU: STM32WB5MMG module on a custom board Firmware package: STM32Cube FW_WB V1.23.0 BLE wireless stack: v1.16.0, full stack TX power: +1 dBm Connection interval: 10 ms min / 15 ms max. Peripheral latency is 0 and the supervision timeout is 6 s. ATT MTU: 180 Role: peripheral only. The central is a Windows 10/11 PC. PHY: Windows defaults to 2M PHYApplicationThe peripheral sends data to the Windows central over GATT notifications at about 5400 bytes/s (~30 packets/s). ProblemAt short range, the data notifications work correctly. As the distance grows to about 30–40 ft, data notifications start to struggle. At that distance, if the Windows central reads or writes any characteristic, the device goes into an unknown state. For a few seconds it continuously sends unexpected data: the values 0x0839 and 0x08FD repeat every 64 bytes.Often the device recovers within a few seconds and then completes the read/write. Sometime

Dear Team,I am using the STM32F746IGT7 microcontroller in our design. As per the datasheet, the specified maximum junction temperature is 125°C.We would like to understand the implications of operating the IC at approximately 145°C, which is above the specified maximum junction temperature. Specifically:Will the IC sustain permanent damage if operated at 145°C? Could its functionality or performance be affected at this temperature? What kind of degradation or long-term effects can be expected? Is there any possibility of immediate failure, or could the IC continue to operate with reduced reliability?The requirement for operation at this elevated temperature was identified after the board had already been populated with this IC. Therefore, we would like to assess the practicality and reliability of operating the existing design at approximately 145°C.Kindly provide your recommendations and any relevant application notes or reliability data for operation beyond the specified junction tem

I am following this link for OEMiROT example with STM32C5 : https://wiki.st.com/stm32mcu/wiki/Security:How_to_start_with_OEMiRoT_on_STM32C5 But this example and steps are with IAR embedded workbench and Open-CMSIS.I need example and configuration with STM32Cube IDE to achieve OEMiROT with STM32C5 series. Let me know if any hint or example already provided