I have encountered a strange problem with some of the dmas seeming to not ​be able to write to GPIOD ODR. I am using 5 dmas in a chain to write 16bit data to port D. Initially, i was using dma1 streams 0-4 but noticed that the signal was correct for ...

Arm_correlate_fast_q31 takes almost twice as much time as arm_correlate_q31.Am i missing something? I measured the calculating time for arm_correlate_q31 for various block sizes and then simply inserted the "fast_" in the function call and it takes a...

In the h745 reference manual, the RAM region of memory is write-back while the code region is write-through. According an app note, cache coherency issues can be avoided by using a write-through ram region. In the h7 the sram sections are aliased in ...

I would like to use the main flash sector for user data and use system bank 2 for code storage. Is it as simple as changing the linker script and the boot address so that code execution starts at the base address of the system flash bank 2?I can't se...