2020-05-27 03:30 AM
I am a bit confused by the language in the F7 reference manual, section 3.3.5 (RM0431) that describes the flash program/erase parallelism. Does the power supply limit the maximum value of the parallelism or does it limit one to a particular size?
The caption for table 6 is "Table 6 provides the correct PSIZE values". Should it say "correct maximum PSIZE values"?
I am asking because i have been writing bytes to the flash with Vcc=3.3V and PSIZE = 0 and its been working fine for a while, but i wonder if that's only luck and i should switch to 32bit writes. Speed is not an issue in this case.
Solved! Go to Solution.
2020-05-27 10:28 AM
Hello All,
Thank you for all reported issues.
This is raised internally for correction : even for incorrect comment in the stm32f7xx_hal_flash.c and the wrong max value for 32-bit program operation.
Best Regards,
Imen
2020-05-27 11:43 AM
Pardon me for jumping in.
Does “max parallelism size�? mean “max parallelism size for given voltage"?
That's, lesser parallelisms also work at the same voltage?
And for the voltages - there is a minimal voltage for a given parallelism size?
So answer of the OP question is, it is always OK to write at PSIZE=0 ?
-- pa
2020-05-27 12:05 PM
I believe so.
It would probably clearer if they listed the minimum voltage for each size.
2020-05-27 12:18 PM
+1
+1
2020-05-27 12:43 PM
Studying table 52 (pg 126) of the data sheet, it appears to take approx 10mW/byte to write to flash, so there must be a limit to width based on the power available. This means that shorter writes than the max are OK.
2020-05-27 01:47 PM
That's not necessarily the only criterium, FLASH transistors are picky, the HV source and other required circuitry can be designed in a million ways, trading between dozens of requirements; and I've seen various weird and seemingly inexplicable requirements for FLASH (and EPROM) programming in the past.
JW
2020-05-27 02:28 PM
Thanks. This is all a result of unemployment and quarantine. the F7s are complicated and i can't imagine the task of ensuring the accuracy of the documentation, which could be a more important product than the chip itself.
2020-05-30 01:52 PM
This is a very good question/issue. I was going to ask it some day, but @RMcCa did it already. So thank you and thanks to @Imen DAHMEN for clearing it up and fixing documentation.
I can add that I also have been using byte (8-bit) writes at VDD = 3,3 V on F76x for some time in different scenarios on Discovery, Nucleo and custom boards and haven't run into any problems with that.