About Kevlar700

Kevlar700 · 2024-03-18

If I generate projects for the STM32U5A9 with sysclks/hclks of 4/48/90/160 Mhz.Then HAL_PWREx_ControlVoltageScaling is always ran early on including with an argument off PWR_REGULATOR_VOLTAGE_SCALE2 for 90 MHz.However the function HAL_PWREx_ControlVo...

Kevlar700 · 2024-01-19

The new STM32L4R9 svd file (version 2.0) has renamedTIM1_OR2 to TIM1_AF1,TIM1_OR3 to TIM1_AF2Removed TIM1_OR1 which is in the reference manual containing ETR_ADC1_RMP and TI_RMPAdded a new TIM1_TISEL at offset 0x68 which is not in the current referen...

Kevlar700 · 2022-09-28

I shall just write a function in software but I would be interested to know if it is supported or not by the CRC peripheral hardware.STM32 cube MX configurator does not allow you to choose X7 for the 7bit (8 term) polynomial described on page 21 of t...

Kevlar700 · 2022-01-18

Is the GPIO ASCR register purposefully left out of the register section of the reference manual for STM32L4+ series?Thanks

Kevlar700 · 2024-10-14

The comment on the chips in my IDE L4,U0,G0,U5 seems incorrect and states2./ by calling HAL API function HAL_RCC_GetHCLKFreq() This would also be incorrect as it does not or no longer updates the global today.2) by calling HAL API function HAL_RCC_Ge...

Kevlar700 · 2024-04-19

Hi, sorry for the delay.Aside from maybe not waiting for BOOSTRDY the code seems fine. Perhaps the HAL_PWREx_ControlVoltageScaling comments deserve a small correction as they apply only to scaling down.from"Before moving to voltage scaling 2, it is m...

Kevlar700 · 2024-01-19

Thank you.The bit offsets in SDMMC_CLKCR are incorrect, which might make for a confusing debug session :)

Kevlar700 · 2022-04-25

Hi @Imen DAHMEN would you be so good as to have the USB checked as well, please. Particularly OTG_GCCFG as the SVD matches the C header but the reference manual shows very different registers?Edit: Scratch that, I found the right registers in the C ...

Kevlar700 · 2022-03-08

The power control registers are also incorrect! Perhaps a full audit is required @Imen DAHMEN ?

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STM32U5 generated code voltage scaling

Latest STM32L4R9 svd file v2 has removed TIM1_OR1

Is CRC-7 X7+X3+X0 supported by STM32L4R9

Missing GPIO ASCR register in the reference manual

Re: Get the System Clock Frequency (SystemCoreClock)

Re: STM32U5 generated code voltage scaling

Re: Latest STM32L4R9 svd file v2 has removed TIM1_OR1

Re: Missing GPIO ASCR register in the reference manual

Re: Missing GPIO ASCR register in the reference manual