FAQs
Thomas E.
Associate II
since ‎2021-10-23
‎2023-06-14

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  • 7 Posts
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User Activity

STM32cubeMX 6.3.0 missing IRQ handler in BDMA ISR.

2021-10-23
On the project we are using LPUART1, more out of pinout convenience than low power, but STM32cubeMX 6.30 and STMCube_FW_H7 V1.9.0 miss placing the HAL_DMA handler for LPUART1 in the BDMA handler.Is there a better place to report STM32CubeMX and FW/HA...

SCB_CleanDCache_by_Addr needs to accept an address not 32 byte aligned.

2021-10-23
The function SCB_CleanDCache_by_Addr needs to be able to handle address that are not 32 byte aligned, but expanding the data cache flushing region to conforming addresses that included the requested region.netXduo calls the function regardless of reg...

Using STM32CubeMX 6.3 how do you set power SMPS/LDO setting for a STM32H725?

2021-10-23
Right now I am having to manually alter the code after each generateI would expect it here But all I see is What am I missing?Many thanks,Thomas
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