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Hi everybody,I have TIM15, configured to PWM generation, in one shot configuration, using OC1N output. The output is set to 0 and timer disabled.. When I later initialize TIM1, the output of TIM15 goes high at the instant the Update event is generate...
I have a project which uses both OPAMPs. For both OA I use dedicated VINM pin.OPAMP1 works correctly.OPAMP2 behaves like the dedicated pin (M2 ball) is not connected to the input multiplexer.I 've tried - mode FOLLOWER: OK - mode STANDALONE, reconnec...
I am unable to switch on the AUTOFF bit in ADC4.DS reads about ADC_PWRR/AUTOFF: The software is allowed to write this bit only when ADEN bit is cleared to 0 (this ensures that no conversion is ongoing).But if this bit is set, the ADC doesn't set ADRD...
Is it possible to switch  VREFBUF clock off after configuration for power save? So the clock is off and the buffer is providing Vref.In DS there is no mention about it (e.g OPAMP has this note).
I have LCD connected to FSMC, 16bit parallel interface.It works, but all signals are twice slower.SYSCLK is 120MHz (checked using MCO), HCLK divider is 1 (checked with debugger).Timers TIM2, TIM3 and TIM4 give expected results, so the system clocks ...
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