About Uwe Bonnes

Uwe Bonnes · 2024-10-25

Hello, please mention RCC_BDCR_LSESYSEN in U0 reference manual in the LCD chapter. This is a new requirement when running LCD with LSE on STM32U series. Maybe chapter with other devices to run on LSE clock will profite too. Regards

Uwe Bonnes · 2024-10-24

Hello,probably I miss something, but I have searched long enough so things start to get unclear.I have set up RTC on STM32U0, so I expect is to be running. But ist does not free running:<(gdb) mon sTarget voltage: 3.24VAvailable Targets:No. Att Driv...

Uwe Bonnes · 2024-10-23

Hello, I asked this several times, with no avail so long, lets try another time: E.g. "https://www.st.com/en/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/documentation.html"sorts the documents alphanumerical by their name. In most ...

Uwe Bonnes · 2024-10-14

AN4879 Rev 8 in table 7 does not list the HS phy for STM32U59|A|F|G

Uwe Bonnes · 2024-09-28

AN2606 Figure 115." Bootloader V9.x selection for STM32U595xx/99xx/A5xx/A9xx" show that the Bootloader USB detection aborts DFU startup to a system reset when no quarz is found. Does this abort also happen if an external HSE oscillator is used?

Uwe Bonnes · 2024-12-10

It might be possible, but I think it is not worth the effort. As I do not see an explicit "half duplex" mode in the ADS8866 datasheet, you should first verify your scheme with CPU interaction. The load should be minimal.

Uwe Bonnes · 2024-12-10

Why do you need half duplex when working with the ADC? What ADC? Half Duplex will not work in the scheme above.

Uwe Bonnes · 2024-12-10

For the H7, e.g. DMA_REQUEST_TIM1_UP could start the readout by writing a word into SPI1_TX, DMA_REQUEST_SPI1_TX would then read out SPI1_RX.However a 2 kHz interrupt load is no big load to the H7, so perhaps first try w/o DMA if your CPU is not to...

Uwe Bonnes · 2024-12-10

Timer at 2 Khz triggers DMA. Dma writes to SPI RX and shifts out e.g. 16 bits for a 16 bit ADC word when set right. SPI TX complete triggers another DMA channel to read SPI RX to memory. Second channel DMA buffer half/full interrupt tiggers semapho...

Uwe Bonnes · 2024-12-10

Look at DMA, e.g. timer triggers DMA and DMA reads ADC

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Mention RCC_BDCR_LSESYSEN in U0 reference manual in the LCD chapter

Help with STM32U0 RTC not running wanted

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STM32U59|A|G with integrated usb hs phy

Does STM32U595 DFU work with external HSE oszillator?

Re: SPI Read without CPU Intervention

Re: SPI Read without CPU Intervention

Re: SPI Read without CPU Intervention

Re: SPI Read without CPU Intervention

Re: SPI Read without CPU Intervention