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davedave95
Associate III
since ‎2018-07-19
‎2023-06-14

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  • 26 Posts
  • 2 Solutions
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Debugging checkstop reset on SPC560P44

2017-06-14
Posted on June 14, 2017 at 11:52Hello,Under certain circumstances involving high interrupt load the CPU triggers a checkstop reset, RGM_FES is 0x8008 in after reboot, indicating the F_CHECKSTOP bit is set.How do I debug the source of the checkstop r...

''relocation truncated to fit: R_PPC_VLE_REL24'' when placing function in .data section

2017-03-06
Posted on March 06, 2017 at 21:26Hello,Trying to make a workaround for the flash-not-ready-after-leaving-power-saving problem, I am placing the below function in a section which goes into the .data section:__attribute__ (( __section__ ('halt'))) voi...

SPCSetRunMode() does sometimes not return

2017-02-14
Posted on February 14, 2017 at 16:41My project on the P44L3 runs in RUN1 mode and uses SPCSetRunMode(SPC5_RUNMODE_HALT0) in the idle loop for power saving. The PIT timer runs at 1Khz, so switching to HALT0 mode is typically done 1000 times per secon...

Does STM run in HALT0 mode?

2017-02-14
Posted on February 14, 2017 at 10:39Hello,Our application on the SPC560P44L3 switches to HALT0 mode in the idle loop for power saving. The PIT is configured to wakeup the CPU every msec for handling timers, which works just fine.Now I'd like to conf...

SPC5 studio project problems when compiling with -Os

2017-02-09
Posted on February 09, 2017 at 17:10When compiling a SPC5 studio generated demo program with -Os to optimize on size, the resulting code stalls during initialisation. in eirqInit() the loop  while (eirqconf[i].eirqNumber != -1) {never terminates whe...
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