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Problem with External intetrupt flag clearing

Arman Ilmak
Senior
Posted on March 19, 2018 at 00:25

Hello guys.

I've recently downloaded ST standard libraries for stm8s series and working with the functions.

In cube mx version when we called an interrupt the callback function automatically was executed and after that, the flag was cleared in IRQ HANDLER function at the end of the interrupt.

But in the standard library for stm8 I can't find any functions that have the flag clearing in the interrupts.

Would you please explain me how can I manage this?

14 REPLIES 14
Philipp Krause
Senior II
Posted on March 19, 2018 at 13:21

Clearing which interrupt flag?

The one(s) in the CC register? Those are cleared by the iret instruction compilers place at the end of an interrupt routine.

Some device-specific flag? That would depend on the device.

Philipp

Posted on March 19, 2018 at 18:57

Clearing external interrupt that I set for port D pin 1.

The code below was generated by cube mx in the stm32f2 board that I had.

void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)

{

/* EXTI line interrupt detected */

if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)

{

__HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);

HAL_GPIO_EXTI_Callback(GPIO_Pin);

}

}

But now that im using stm8s i see no function like this in interupt source files.

Arman Ilmak
Senior
Posted on March 19, 2018 at 20:02

http://www.st.com/en/embedded-software/stsw-stm8069.html

 

This is the lib I'm using.

Posted on March 19, 2018 at 20:00

The code I wrote is working and interrupt is generated every time I push the button.

But in stm32 MCUs I put a delay before the flag interrupt cleared so the bouncing of the push button wouldn't cause the interrupt occurs again, but now I can't find where the flag is cleared and the interrupt occurs sometimes just one time and sometimes more than one time by pushing the push button.

Posted on March 20, 2018 at 09:24

Well, the best solution for debouncing is still hardware (have the button connect to gnd/vcc when it is at rest or fully pressed, disconnected in between, use a capacitor to keep the value in the previous state while it is being toggled.

But sometimes this is not available (I was in the same situation when programming retrogames for the ColecoVision video game systems where the controllers do not have such hardware-debouncing). Then some delay mechanism might be part of software debouncing.

I don't think there is some explicit flag for the GPIO interrupts in STM8S hardware to clear. Which edge/level sensitivity setting do you use (EXTI_CR?)?

One possibility to implement the delay would be: When the button is pressed, set a timer with an interrupt and disable the GPIO interrupt. In the ISR for the timer, then reenable the GPIO interrupt.

Philipp

Posted on March 20, 2018 at 14:05

Philipp Krause wrote:

I don't think there is some explicit flag for the GPIO interrupts in STM8S hardware to clear. Which edge/level sensitivity setting do you use (EXTI_CR?)?

How can it be possible that there be no flags for the external interrupt?There must be some flags that the MCU finds out that the interrupt occurred.

I searched through the user manual but I didn't find any flags for EXTI either.

I use falling edge sensitivity.

Philipp Krause wrote:

One possibility to implement the delay would be: When the button is pressed, set a timer with an interrupt and disable the GPIO interrupt. In the ISR for the timer, then reenable the GPIO interrupt.

This would be the best if there is no EXT flag.Thanks alot.

Posted on March 20, 2018 at 14:39

How can it be possible that there be no flags for the external interrupt?There must be some flags that the MCU finds out that the interrupt occurred.

I searched through the user manual but I didn't find any flags for EXTI either.

I use falling edge sensitivity.

But that flag need not be writeable by the user. There could just be some flag to account for the pending interrupt, cleared the moment the interrupt is served.

Philipp

P.S.: Actually there is a mention of a latch for pending interrupts on page 63 of the manual.

henry.dick
Senior II
Posted on March 20, 2018 at 22:42

'

the flag was cleared in IRQ HANDLER function at the end of the interrupt.'

I find that to be a bad practice - I clear the flag at the beginning of the isr, so that if an event arrives while I'm still in the isr, it can be serviced - the execution will jump right back to the isr upon returning.

If you clear the flag in the end, any events arriving before the end of the isr would be ignored.

I wonder why st did it this way.

Posted on March 20, 2018 at 21:48

Hello Arman,

I believe that Philipp is right. I checked EXTI files from STM8S Standard Peripheral Library and I didn't find a function to handle pending EXTI interrupt. I have to say that for me it was surprising as well... Then I checked MCU's reference manual (RM0016) and this document seems to confirm our assumption. I didn't find a register, which stores flags, that indicate pending EXTI interrupt. EXTI module contains only EXTI_CR1 and EXTI_CR2 registers, which allow to set sensitivity level (falling/rising edge). Finally I opened presentation from STM8S training material and I found a sentence related to this subject. Please see it below.

0690X00000609uhQAA.png

However please note that all above information is related to STM8S and if we take a look on STM8L, the situation is completely different. There are registers, which keep the information about pending EXTI interrupt. These are EXTI_SR1 and EXTI_SR2. Therefore STM8L Standard Peripheral Library provides a function, which clears pending EXTI interrupt. It is named EXTI_ClearITPendingBit().

Regards

Szymon