2024-08-01 05:35 AM
Problem : GPIO PB7,8 is pull up in reset state.
Reproduction: After Clearing Reset (Reset Goes low) the voltage on PB7 and PB8 goes high. uc is erased. We have external pull down connected to those pins (100k), but the signal stays at 2.5V
Could you confirm that pull-up in reset mode on those pins is correct behavior?
I suspected that GPIO should go to input mode and pull down pull up should be disabled.
2024-08-01 06:08 AM
PB7 and PB8 are in analog mode with no pullups during reset and should be pulled down if an external resistor is present. Perhaps measure resistance between them and ground with the chip unpowered and ensure you see 100 kOhm.
Don't see anything in the RM suggesting these pins are special.
2024-08-01 07:29 AM - edited 2024-08-01 07:30 AM
I have 100KOhm between each pin and 100kOhm while board is powered off.
We took second board and we performed following procedure:
We will do more tests tomorrow.