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Error: verification of flash memory failed after write operation

sandeep2
Associate II
Posted on July 10, 2009 at 01:00

Error: verification of flash memory failed after write operation

12 REPLIES 12
sandeep2
Associate II
Posted on May 17, 2011 at 15:03

Hi,

I am using the STM8S eval board and Swim-Rlink debugger.

After running the program, when I say ''stop program'', I receive this error:

Error: gdi-error[40121]: verification of flash memory failed after write operation.

Can you plz tell me why is it so? What's wrong and how to fix it?

Attaching a screen shot of the error.

Thanks,

-SU

sandeep2
Associate II
Posted on May 17, 2011 at 15:03

Another i/p. Seems the things are getting wrong while doing clock related settings.

Please note that in my STVD project settings(& while downloading code using STVP), i've selected MCU as STM8AF519A.

However, the eval board has MCU STM8S208MBT6B.

1) What difference does it make as far as debugging is concerned?

2) While going further, what settings/care do I need to take(considering am using the STM8S208MBT6B MCU eval board, but code written for STM8AF519A)?

Thanks in advance.

-SU

[ This message was edited by: sandeep.undale on 18-06-2009 16:27 ]

sandeep2
Associate II
Posted on May 17, 2011 at 15:03

More inputs:

1) CLK->ICKR = CLK_ICKR_RESET_VALUE; //(u8)0x01

Not able to write 0x01 to CLK->ICKR. It remains 0x03.

i.e., While I want to set only the ''HSIEN(High speed internal RC oscillator enable)'' bit of ICKR(Internal clock register), the h/w is also setting the ''HSIRDY(High speed internal oscillator ready)'' bit.

2) The error occurs when I try to do this:

CLK->SWR = (u8)CLK_SOURCE_HSE; //0xB4

i.e. while selecting HSE as master clock source.

Does this mean that for debugging purpose, I need to select HSI as master clock source?

Please answer all my queries, starting for 1st post on this thread.

Thanks.

-Sandy

jatin
Associate II
Posted on May 17, 2011 at 15:03

Regarding the 1st question-

Error: gdi-error[40121]: verification of flash memory failed after write operation.

Are you writing the program memory in your code?

2nd question-

1) What difference does it make as far as debugging is concerned?

>>> On the debugging side, you wont see any difference.

2) While going further, what settings/care do I need to take(considering am using the STM8S208MBT6B MCU eval board, but code written for STM8AF519A)?

>>> STM8AF519A(96K) has less program memory w.r.t. to STM8S208MBT6B(128K). Take care that code size does not exceed the limit of 96K. Moreover STM8S208xxx is a non-automotive device. On the other hand, STM8AF9A is an automotive device. So refer the STM8A reference manual and the datasheet for the device features.

jatin
Associate II
Posted on May 17, 2011 at 15:03

Following are the answers to your questions related to the clock controller-

1) CLK->ICKR = CLK_ICKR_RESET_VALUE; //(u8)0x01

Not able to write 0x01 to CLK->ICKR. It remains 0x03.

i.e., While I want to set only the ''HSIEN(High speed internal RC oscillator enable)'' bit of ICKR(Internal clock register), the h/w is also setting the ''HSIRDY(High speed internal oscillator ready)'' bit.

>>>> You can not clear the HSIRDY bit by software. This bit is controlled by the hardware. Infact you can clear the HSIEN bit by software. But HSIEN bit can not be cleared under following conditions:

- When activated as safe oscillator by the CSS.

- When switching to HSI clock (see CLK_SWR register).

- When HSI is selected as the active CCO source (see CLK_CCOR register).

It cannot be cleared when HSI is selected as clock master (CLK_CMSR register), as active CCO source or if the safe oscillator (AUX) is enabled.

After reset, the HSI is the default clock source available until you switch to other clock source.

2) The error occurs when I try to do this:

CLK->SWR = (u8)CLK_SOURCE_HSE; //0xB4

i.e. while selecting HSE as master clock source.

>>> To perform the clock switching to HSE, follow these steps:

SWCR |= 0x02;

SWR = 0xb4;

while((SWCR & 0x01)); // wait for SWBSY to get cleared

Does this mean that for debugging purpose, I need to select HSI as master clock source?

>>> No, you can switch to HSE by following the above steps.

sandeep2
Associate II
Posted on May 17, 2011 at 15:03

Thanks for all your inputs Jatin and also for quick reply.

Unfortunately, it doesn't work.

The error,''gdi-error[40121]: verification of flash memory failed after write operation.'', occurs as soon as this statement is executed:

/* High Speed External clock */

CLK->SWR = (u8)CLK_SOURCE_HSE; //SWR = 0xb4;

Okey. Here is exactly what I am doing:

1) Compile the code and download it using the STVP tool.

(STVP: Open .s19 file(can see the prog hex instructions under 'program memory' tab), Program -> All tabs, done.)

*For STVP config, check the attachment(selected STM8S208xB).

2) STVD project settings: MCU selection is for STM8AF519A. So I am able to selected MCU's peripheral registers while debugging.

3) Start debugging.

Here is the clk init code till it breaks:

Code:

<BR>CLK_Source_TypeDef clock_master; <BR> u16 u16_Down_Counter = CLK_TIMEOUT; <BR> ErrorStatus Swif = ERROR; <BR> <BR> <BR> /* Configure Clock */ <BR> <BR> <BR> CLK->ICKR = CLK_ICKR_RESET_VALUE; <BR> CLK->ECKR = CLK_ECKR_RESET_VALUE; <BR> CLK->SWR = CLK_SWR_RESET_VALUE; <BR> CLK->SWCR = CLK_SWCR_RESET_VALUE; <BR> CLK->CKDIVR = CLK_CKDIVR_RESET_VALUE; <BR> CLK->PCKENR1 = CLK_PCKENR1_RESET_VALUE; <BR> CLK->PCKENR2 = CLK_PCKENR2_RESET_VALUE; <BR> CLK->CSSR = CLK_CSSR_RESET_VALUE; <BR> <BR> CLK->CCOR = CLK_CCOR_RESET_VALUE; <BR> while (CLK->CCOR & CLK_CCOR_CCOEN) <BR> {} <BR> CLK->CCOR = CLK_CCOR_RESET_VALUE; <BR> <BR> CLK->CANCCR = CLK_CANCCR_RESET_VALUE; <BR> CLK->HSITRIMR = CLK_HSITRIMR_RESET_VALUE; <BR> CLK->SWIMCCR = CLK_SWIMCCR_RESET_VALUE; <BR> <BR> <BR> <BR> /* Output Fcpu on CLK_CCO pin */ <BR> /* Clears of the CCO type bits part */ <BR> CLK->CCOR &= (u8)(~CLK_CCOR_CCOSEL); <BR> <BR> /* Selects the source */ <BR> CLK->CCOR |= (u8)CLK_OUTPUT_MASTER; <BR> <BR> <BR> /* Current clock master saving */ <BR> clock_master = (CLK_Source_TypeDef)CLK->CMSR; <BR> <BR> /* Automatic switch mode management */ <BR> /* Enables Clock switch */ <BR> CLK->SWCR |= CLK_SWCR_SWEN; <BR> <BR> /* Disables Switch interrupt */ <BR> CLK->SWCR &= (u8)(~CLK_SWCR_SWIEN); <BR> <BR>while((CLK->SWCR & 0x01)); // wait for SWBSY to get cleared <BR> <BR> /* Selection of the target clock source */ <BR> <BR> /* High Speed External clock */ <BR> CLK->SWR = (u8)CLK_SOURCE_HSE; ----> ERROR OCCURS HERE! <BR> <BR>

While I get an update from you, I'll proceed with HSI I guess.

Thanks for all your help.

Regards,

SU

[ This message was edited by: sandeep.undale on 19-06-2009 16:39 ]

mozra27
Associate II
Posted on May 17, 2011 at 15:03

Hi Sandeep,

Please check this point:

Ensure that the quartz crystal is plugged (HSE): if the HSE clock is higher to 16MHz and lower to 24MHz ensure to set the ''Flash_Wait_States'' option byte to 1 before running the project.

Regards

mozra

jatin
Associate II
Posted on May 17, 2011 at 15:03

Hi Sandeep,

As asked by Mozra, What is the HSE clock frequency? If its 24Mhz and use 1 wait state programmed with the option byte.

Regards,

Jatin

mozra27
Associate II
Posted on May 17, 2011 at 15:03

Hi Sandeep,

Can you please check the CLK Library examples with your environment, Thanks to keep us informed

Regards

mozra