USART in synchronous mode

[bassetteporn11]

So I have a busy board, and SPI MISO is occupied.

I would like to communicate in synchronous fashion with an FPGA.

Can I Make this USART peripheral work in a SPI Master full dulex, synchronous mode?

The baud rate seems to be limited in CubeMx, is this because the drivers are too weak?

In this peripheral, wich seems to never be used in such cases, will the receiver pin correctly receive the clocked in DATA or will it fail? In my case the MCU will be acting as the throttle clock. Just like SPI.

We are talking of speeds of 8 Mhz? On a 35mm trace.

[waclawek.jan]

> Can I Make this USART peripheral work in a SPI Master full dulex, synchronous mode?

Yes, except that the clock won't be continuous.

https://community.st.com/s/feed/0D50X00009bLS7GSAW (formatting lost courtesy of dilettantish forum migration)

> The baud rate seems to be limited in CubeMx, is this because the drivers are too weak?

Driver of what? The baudrate is generated by the same baudrater as UART, i.e. PCLK/N/8 or 16.

> We are talking of speeds of 8 Mhz? On a 35mm trace.

Accross a movie film frame?

There's no material difference in the signal details between synchronous USART and SPI. Don't use unnecessarily high drive (OSPEEDR setting), and maintain decent return (ground).

JW

[bassetteporn11]

I mentionned that the layout is in optimal situation to accept this at its highest possible speed. Well it will depend, on the FPGA.

Yes, this is for some shift register type logic and should be well suited for the task

In this case, there is only the FPGA on this "bus", so the lack of NSS and LSB first is of no concern.

The slight loss of speed is not a big issue.

Are the FIFO buffers the same size however?

[waclawek.jan]

What FIFO buffers? My crystal cube is hazy today.

JW