STM32G0B1 NRST not pinned?
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‎2025-03-16 6:23 AM
Hi,
Not sure if this is an issue or if I'm missing something.
Shouldn't the processors reset-pin be pinned by default even though it allows for alternative functions?
Maybe this is a non issue, but I feel like the reset pin is somewhat critical.
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‎2025-03-16 6:47 AM - edited ‎2025-03-16 7:03 AM
Pin 10 is tied to both PF2 and NRST. Not one or the other, but both. You can change the NRST functionality in the option bytes but by default it functions as a normal NRST pin.
If you configure PF2 as an output and set it low, the chip will reset (and be hard to connect to, so don't do it).
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‎2025-03-16 6:47 AM - edited ‎2025-03-16 7:03 AM
Pin 10 is tied to both PF2 and NRST. Not one or the other, but both. You can change the NRST functionality in the option bytes but by default it functions as a normal NRST pin.
If you configure PF2 as an output and set it low, the chip will reset (and be hard to connect to, so don't do it).
