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Possible stm32G0 cube mx generation Error for usb

TSÉNA.1
Associate II

While setting up a project using cubeMx for a stm32G0, I stumbled across a possible error on the USB_device files. This error resulted in the usb reset handler stalling the machine. My project specifies the USB as full speed and looking in the generated usbd_conf.c, I found the following lines in HAL_PCD_ResetCallback

USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
  if (( hpcd->Init.speed != USB_DRD_SPEED_FS) || (hpcd->Init.speed != USB_DRD_SPEED_LS))
  {
    Error_Handler();
  }
    /* Set Speed. */
  USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
 
  /* Reset Device. */
  USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);

In that case the line 2 test will always result in the Error_handler being called as we are indeed FS (and thus not LS). Using thins condition instead solved the usb issue :

if( hpcd->Init.speed != USB_DRD_SPEED_FS){
    Error_Handler();
}

Could this be an oversight in the cubeMX generation or is it that I missed something blatantly obvious ?

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11 REPLIES 11
Banxian
Associate II

I am using stm32cubemx 6.4.0 with the fixed version of HAL_PCD_ResetCallback, but still can't get usb device to work.

I created template project by cubemx, and selected usb cdc device from middleware and enabled usb in connectivity. I also enabled swd for debug.

I solved clock in wizard, hclk is clocked from hsi16->pll, and usb clock is hsi48.

after rebuild and download, device triggered a enumeration but doesn't reply to host.

I am using a beagle usb sniffer, it doesn't reply first setup packet(get descriptor).

the dfu bootloader works fine if I erased flash, so it's not a hardware problem I think.

edit:

I changed some extra options in ​cubemx, if I enable CRS sync in RCC settings and usb interrupts in NVIC settings, usb device can be recognized by host now.

MichaelSweden
Associate III

Oh, now you find it. I was on the way to write this:

I have not used that version, but maybe I anyway can recommend to check that the "USB, UCPD1 and UCPD2 global interrupts" is enabled, (System Core - NVIC).