GPS PPS aligned External ADC sampling in STM32L4P5 for multiple location sync of ADC

[mahapusha]

Dear Members,
I am using STM32L4P5VGT, STM32CubeMX 6.9.1, and STM32Cube_FW_L4_V1.18.0.
In our board, we are using external ADC(16 bits with 8 CH, SAR, and simultaneously S/H. ADC sampling rate starts from 2K to 16K. In our use case, there will be multiple such boards in the field at different locations, and sampling of all these ADC should be in sync as much as possible. For this purpose, onboard GPS PPS output is used to realign the Sampling PWM output of the MCU which is the trigger of ADC start, if it drifts at every second. The MCU is also using TXCO with very low ppm. It is also expected that if the PPS pulse is missing due to weather conditions, PWM output should continue without sync till the GPS recovers.
The scheme used as follows and it is working fine as per requirement:
1. The TIM2, CH2 is used as PPS input (ICP direct mode), and
2. The TIM2, CH1 is used ADC Start Conversion input (PWM Generation CH1 mode)
3. TIM2 timer used, Slave with Reset Mode, Trigger Source TI2FP2, Clock source is internal, No Interrupt and DMA
4. CubeMX Timer Settings are attached due to message constraints.
Question 1 - Why do I need the ICP mode of CH2, I am not capturing timer values. Can I do without ICP mode by making changes in the configuration of the timer trigger etc.? I tried but did not work.

Thanks in advance for the update.
Mahabir Prasad

[MasterT · Accepted solution]

"2. The TIM2, CH1 is used ADC Start Conversion input (PWM Generation CH1 mode)"

Should it be : 2. The TIM2, CH1 is used ADC Start Conversion Output (PWM Generation CH1 mode) ?

Than, CH2 is in OCP mode.

I don't think this design is correct, to have precise start conversion clock event derived from PPS, signal shouldn't pass through uCPU - there is re-synchronization delay  on inputs, and if timer clocked on internal bus jitter is unavoidable. Likely you can try use 10 MHz out of GPS and run timer from external clock, so PPS and timer always in"sync" but I'm not sure. External counter IC as divider from 10 MHz down to 2 - 16k seems more reliable solution, uCPU in this case is a manager division ratio, start/ stop service etc, and not in the precision signal part 

[Mahmoud Ben Romdhane]

Hello @mahapusha.

First let me thank you for posting.

Related to this Application Note AN4013. Input Capture Mode is a method of dealing with input signals, which allows you to read a digital signal on a pin and measure times between HIGH and LOW transitions.

The period is calculated by subtracting these two values.  This method is used only with channel 1 or channel 2.

It will be useful to select this mode because the time events in your application is extremely important. 

Thanks. 

Mahmoud.

[mahapusha]

Point 2 - It is ok, I was considering with respect to ADC input and you are talking with respect to MCU.
The delay of re-sync is acceptable as long as it is consistent, I cannot use an external IC to handle it, will be going via MCU as designed, Some modification and channels, their modes and software handling is acceptable. By ICP mode, my intention is not to measure the PPS duration, only looking for any drift in one second or due to power on/off, realign to all in the same manner.

[mahapusha]

My aim is not to measure the PPS duration, I am looking to re-align the PWM output to this rising edge of PPS. Do still need ICP mode on it. In your previous post, for CH2, you are telling OC mode, see my attached CubeMX file in original post, I am using it as ICP. Can you clarify more on it.

[Tesla DeLorean]

I'd probably free run TIM2 in a maximal mode and have it latch (Input Capture), and probably trigger, off the 1PPS

[mahapusha]

Thanks for the suggestion to use free running the TIM2 to calculate the PPM width and indirectly recalculate the sampling rate, which is not my intention. My MCU external CXTO is very low ppm, +/-2.5ppm so change within 1 second is not a problem. The main use of PPS is to align all the units in the field. The current scheme, used by me is working as per my expectation. The query to the community is - Why do I need ICP on PPS input as attached earlier scheme of timer setting from CubeMX, I am using this input to go CH1 of TIM2 as slave reset mode?

[mahapusha]

I will keep this option in mind, till that time, I will continue with current solution of PPS and internal timer alignment with best hope.

[MasterT]

Frankly, I dont understand your current design at all. If presise alignment required to such degree that GPS is in re-view, than adc start conversion clock synchronized with GPS also required. No stm32 product alows this scheme, because PLL (some uCPU has 3 of them) can't be synchronize to external events. Running ICP doesn't make sense since re-sinchronization logic of the timer introduce jitter, for example stm32G474re running at 160 MHz has +-6 nsec jitter. 

There are GPS units that support reconfiguration of the output clock, so instead of 1 PPS you can get desirable 16 kHz or so stright from gps unit.

[mahapusha]

I fully agree with you and had it in mind when the design started. It is a battery or solar-operated node in the forest area. I did not find a suitable GPS module where we could program the PPS output. I found one part and was not sure how long they could support it. Then, another option was to use an external GPS-aligned programmable oscillator. Either the cost was very high or the power was very high, so I decided on this approach with the limitations rightly pointed out by you.
If you know a simple and low-power solution, let me know and I am ready to review the design, will incorporate it. You can communicate on my email ID also.

Dr Mahabir Prasad
mahabir.prasad@mapstech.co.in