CubeMX 6.13.0 and MCU Package H7 v1.12.0 produce incorrect PCLK frequencies

[djanovy]

I updated to CubeMX 6.13.0 and firmware package 1.12.0 for and STM32H755BIT chip and found several issues with the new release:

1. Where is it documented that the new ExitRun0Mode() requires 'USE_PWR_LDO_SUPPLY" to be defined if I want to use that mode?  Shouldn't it be defined by CubeMX when the power parameters are selected in the RCC section?
2. If I am using the Voltage regulator in the LDO supply mode (see RM0399, p 274, Fig. 22, Section 1), what is the purpose of defining SMPS in line 217 of stm32h755xx.h?  In line 440 of system_stm32h7xx_dualcore_boot_cm4_cm7.c the define of SMPS is used to disable the SMPS - shouldn't the define be used to enable the SMPS?
3. Worst issue:  The clock rates returned from PCLK function calls shown below are now showing 240 MHz!  This has messed up the USARTs and all the timers. I thought the MAX clock rate for the PCLK clocks were 120 MHz (see DS12919, p. 110, Table 23, fPCLK, at VOS0 setting).

HAL_RCC_GetPCLK1Freq();
HAL_RCC_GetPCLK2Freq();

Screen capture showing 240 MHz clock rate on PCLK:

[Peter3718]

Hi, @djanovy 

I ran into same issue as you

1. RCC clock generation is wrong.

2. Both USE_PWR_LDO_SUPPLY and USE_PWR_DIRECT_SMPS_SUPPLY are defined.

Not understand why ST has sucu low level issue. After you tried out FW_H7_1.12.1, are these issue resolved?

Peter