STM32G070: UART speed of 115200 is not possible with PC when running SYSCLK clock at 64MHZ - however is when run at 59.0MHZ

from RM0454 Rev 3 Page771

The oversampling method can be selected by programming the OVER8 bit in the USART_CR1 register either to 16 or 8 times the baud rate clock (see Figure 267 and Figure 268).  

Depending on your application:

• select oversampling by 8 (OVER8 = 1) to achieve higher speed (up to usart_ker_ck_pres/8). In this case the maximum receiver tolerance to clock deviation is reduced (refer to Section 26.5.8: Tolerance of the USART receiver to clock deviation on page 775)

• select oversampling by 16 (OVER8 = 0) to increase the tolerance of the receiver to clock deviations. In this case, the maximum speed is limited to maximum usart_ker_ck_pres/16 (where usart_ker_ck_pres is the USART input clock divided by a prescaler). 

 --end of quoting--

Thus @64MHz using 16x oversampling the maximum baud rate is 4MHz.

So 'ideally' if 16x oversampling, SYSCLK should be a 16x multiple of the baud rate.

or 'ideally' if 8x oversampling, SYSCLK should be a 8x multiple of the baud rate.

regarding divisor if I understand you correctly please see response to @Community member​ 

Hope ST see suggestion for nomimal error.