2021-06-05 10:16 AM
I am using STM32F446RE. I am using the STM32CubeIDE. As STM32F446RE is Cortex-M4 based processor I have also gone through the M4 generic user guide and found that the range of NVIC_ISER0- NVIC_ISER7 is 0xE000E100- 0xE000E11C. But when I ran the code in debug mode and go to the NVIC registers I see the below addresses.
Can I resolve this issue or is it hardware issue?
Can anyone help please
2021-06-29 10:19 PM
Hi PK thanks for your reply back.
I found all mine .svd file from command prompt:
open cmd and excute this command: C:\>where /r c: "*.svd"
and Then you will see there is svd files:
C:\Program Files\STMicroelectronics\STM32Cube\STM32CubeProgrammer\SVD\Cores\Cortex-M0plus.svd
C:\Program Files\STMicroelectronics\STM32Cube\STM32CubeProgrammer\SVD\Cores\Cortex-M3.svd
C:\Program Files\STMicroelectronics\STM32Cube\STM32CubeProgrammer\SVD\Cores\Cortex-M33.svd
C:\Program Files\STMicroelectronics\STM32Cube\STM32CubeProgrammer\SVD\Cores\Cortex-M4.svd
C:\Program Files\STMicroelectronics\STM32Cube\STM32CubeProgrammer\SVD\Cores\Cortex-M7.svd
**I just opened Cortex-M4.svd file and searched NVIC ISER0 and ISER1 . I saw offset address are wrong "<addressOffset>0xFC</addressOffset>"
I changed it and ı debuged my code and I opened NVIC registers MAP. But guys over there you will see a tools change. U need use your customer svd file as a this file
where it is "C:\Program Files\STMicroelectronics\STM32Cube\STM32CubeProgrammer\SVD\Cores\Cortex-M4.svd"
here is how I changed:
---------------------------------------------------------------------------------------------------------------
<name>NVIC</name>
<description>Nested Vectored Interrupt Controller registers</description>
<baseAddress>0xE000E004</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0xCA0</size>
<usage>registers</usage>
</addressBlock>
<registers>
<register>
<name>ICTR</name>
<displayName>ICTR</displayName>
<description>ICTR</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-only</access>
<fields>
<field>
<name>INTLINESNUM</name>
<description>INTLINESNUM</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>NVIC_ISER0</name>
<displayName>NVIC_ISER0</displayName>
<description>NVIC_ISER0</description>
<addressOffset>0xFC</addressOffset>
<size>0x20</size>
<access>read-write</access>
</register>
<register>
<name>NVIC_ISER1</name>
<displayName>NVIC_ISER1</displayName>
<description>NVIC_ISER1</description>
<addressOffset>0x100</addressOffset>
<size>0x20</size>
<access>read-write</access>
</register>
<register>
<name>NVIC_ISER2</name>
<displayName>NVIC_ISER2</displayName>
<description>NVIC_ISER2</description>
<addressOffset>0x104</addressOffset>
<size>0x20</size>
<access>read-write</access>
</register>
<register>
<name>NVIC_ISER3</name>
<displayName>NVIC_ISER3</displayName>
<description>NVIC_ISER3</description>
<addressOffset>0x108</addressOffset>
<size>0x20</size>
<access>read-write</access>
</register>
<register>
<name>NVIC_ISER4</name>
<displayName>NVIC_ISER4</displayName>
<description>NVIC_ISER4</description>
<addressOffset>0x10C</addressOffset>
<size>0x20</size>
<access>read-write</access>
</register>
<register>
<name>NVIC_ISER5</name>
<displayName>NVIC_ISER5</displayName>
<description>NVIC_ISER5</description>
<addressOffset>0x110</addressOffset>
<size>0x20</size>
<access>read-write</access>
</register>
<register>
<name>NVIC_ISER6</name>
<displayName>NVIC_ISER6</displayName>
<description>NVIC_ISER6</description>
<addressOffset>0x114</addressOffset>
<size>0x20</size>
<access>read-write</access>
</register>
<register>
<name>NVIC_ISER7</name>
<displayName>NVIC_ISER7</displayName>
<description>NVIC_ISER7</description>
<addressOffset>0x118</addressOffset>
<size>0x20</size>
<access>read-write</access>
</register>
2021-07-27 01:24 AM
Finally, They fixed with new update
2021-07-27 01:24 AM
Version: 1.7.0
Build: 10852_20210715_0634 (UTC)