How to set the FRXTH bit in STM32F407vgt6

baby_chicken · ‎2024-08-27

Hello Everyone,

I am now looking for something like the LL_SPI_SetRxFIFOThreshold() function that I can use with the STM32F407vgt6 is there a good way?

What we want to do is, as an example, using the LL_SPI_SetRxFIFOThreshold() function, we want to add a process called LL_SPI_SetRxFIFOThreshold(SPI2, LL_SPI_RX_FIFO_TH_QUARTER)

Thank you in advance.

STTwo-32 · ‎2024-08-27

hello @baby_chicken

the procedure for the STM32H742 is different from the STM32F7, in fact:

To set the threshold level for the RXFIFO (Receive FIFO) in SPI communication on the STM32H7, you need to configure the FTHLV (FIFO Threshold Level) bits in the SPI control register. Here are the steps to do this:

Determine the Data Frame Size: The FTHLV value must be programmed as a multiple of the number of frames/data access. For example:

If 32-bit access is used for up to 8-bit frames, FTHLV should be a multiple of 4.
If 16-bit access is used for up to 8-bit frames or 32-bit access for up to 16-bit frames, FTHLV should be a multiple of 2.

Set the RXFIFO Threshold: The RXFIFO threshold setting must be always higher or equal to the read access size to avoid spurious extra data reads. The FIFO data access less than the configured data size is forbidden. One complete data frame must be always accessed at minimum.
Configure the SPI Control Register: Write the appropriate value to the FTHLV bits in the SPI control register.

You can verify all this on the paragraph 55.4.14 of the RM0477.

The LL function used to Set threshold of FIFO that triggers a transfer event (FTHLV bit) is:

void LL_SPI_SetFIFOThreshold(SPI_TypeDef *SPIx, uint32_t Threshold);

Best Regards.

STTwo-32

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STTwo-32 · ‎2024-08-27

Hello @baby_chicken

As i've told you before, this bit is not available on the STM32F407 MCU. So, you can't sit it or right to it. For such a configuration, you may have to use another product (STM32F7 for example).

Best Regards.

STTwo-32

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baby_chicken · ‎2024-08-27

@STTwo-32 , thank you for your response

Is it possible to use it with STM32H742VGT6?

Best regards.

STTwo-32 · ‎2024-08-27

hello @baby_chicken

the procedure for the STM32H742 is different from the STM32F7, in fact:

To set the threshold level for the RXFIFO (Receive FIFO) in SPI communication on the STM32H7, you need to configure the FTHLV (FIFO Threshold Level) bits in the SPI control register. Here are the steps to do this:

Determine the Data Frame Size: The FTHLV value must be programmed as a multiple of the number of frames/data access. For example:

If 32-bit access is used for up to 8-bit frames, FTHLV should be a multiple of 4.
If 16-bit access is used for up to 8-bit frames or 32-bit access for up to 16-bit frames, FTHLV should be a multiple of 2.

Set the RXFIFO Threshold: The RXFIFO threshold setting must be always higher or equal to the read access size to avoid spurious extra data reads. The FIFO data access less than the configured data size is forbidden. One complete data frame must be always accessed at minimum.
Configure the SPI Control Register: Write the appropriate value to the FTHLV bits in the SPI control register.

You can verify all this on the paragraph 55.4.14 of the RM0477.

The LL function used to Set threshold of FIFO that triggers a transfer event (FTHLV bit) is:

void LL_SPI_SetFIFOThreshold(SPI_TypeDef *SPIx, uint32_t Threshold);

Best Regards.

STTwo-32

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

baby_chicken · ‎2024-08-27

@STTwo-32 , thank you for your response

Thank you for your very detailed answer!.

SofLit · ‎2024-08-27

Almost the same question in this thread: https://community.st.com/t5/stm32cubeide-mcus/quot-ll-spi-setrxfifothreshold-was-not-declared-in-this-scope/td-p/712486

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.

baby_chicken · ‎2024-08-27

@STTwo-32 , thank you for your response

Thank you for your very detailed answer!.