2024-12-12 04:21 PM - edited 2024-12-12 04:22 PM
Anybody have Linker.ld and Loader_src.c file for STM32H563? I have done one for the STM32H743 on another project and made an attempt to modify these for the STM32H563 but it's not working. Appreciate any guidance.
I changed the RAM location from 0x24000000 for the H7 to 0x20000000 for the H5 but not sure what else is different as it pertains to a loader.
Something with the Init could be wrong...
int Init(void) {
*(uint32_t*)0xE000EDF0 = 0xA05F0000; //enable interrupts in debug
// Added per suggestion from ST to clear out QSPI structure
memset(&hospi1, 0, sizeof(hospi1));
SystemInit();
/* ADAPTATION TO THE DEVICE
*
* change VTOR setting for H5 device
* SCB->VTOR = 0x20000000 | 0x200;
*
* change VTOR setting for other devices
* SCB->VTOR = 0x20000000 | 0x200;
*
* */
SCB->VTOR = 0x20000000 | 0x200;
__set_PRIMASK(0); //enable interrupts
HAL_Init();
SystemClock_Config();
MX_GPIO_Init();
__HAL_RCC_OSPI1_FORCE_RESET(); //completely reset peripheral
__HAL_RCC_OSPI1_RELEASE_RESET();
if (CSP_QUADSPI_Init() != HAL_OK) {
__set_PRIMASK(1); //disable interrupts
return LOADER_FAIL;
}
if (CSP_QSPI_EnableMemoryMappedMode() != HAL_OK) {
__set_PRIMASK(1); //disable interrupts
return LOADER_FAIL;
}
/*Trigger read access before HAL_QSPI_Abort() otherwise abort functionality gets stuck*/
uint32_t a = *(uint32_t*) 0x90000000;
a++;
__set_PRIMASK(1); //disable interrupts
return LOADER_OK;
}
Solved! Go to Solution.
2024-12-18 02:31 PM
The VTOR address would be 0x20003000 | 0x200 if using interrupts, like ST does. The address is aligned to 0x200 (ie 8 zeros) boundaries.
The H7 build at 0x24000004, most others at 0x20000004. It's basically the address of the primary RAM
The .map file should provide some confirmation of where g_pfnVectors resides in the build
2024-12-12 05:57 PM
ST builds the H5 loaders for 0x20003004
https://github.com/cturvey/stm32extldr/blob/main/ExternalLoader_H5.ld
2024-12-12 07:33 PM - edited 2024-12-13 08:45 AM
Thanks for the tip! Does the Vector Table Offset Register (VTOR) need to be adjusted for this device like the H7? Maybe 0x20003004 | 200?
Also I assume the H5 still uses 0x90000000 as the virtual address for external Flash over QSPI?
2024-12-18 02:31 PM
The VTOR address would be 0x20003000 | 0x200 if using interrupts, like ST does. The address is aligned to 0x200 (ie 8 zeros) boundaries.
The H7 build at 0x24000004, most others at 0x20000004. It's basically the address of the primary RAM
The .map file should provide some confirmation of where g_pfnVectors resides in the build
2024-12-20 08:41 AM
Yes, that's what I ended up using and got it working with some slight modifications to my OSPI drivers and loader_src.c. For some reason this one didn't like to use Abort to get out of memory mapped mode so I needed to do call the QSPI initialization at the start of each operation (read, write, or erase).