2024-08-27 01:19 AM - edited 2024-08-27 05:51 AM
Hello @Erwan SZYMANSKI , how are you ,I hope you doing well.
I have a problem with my spi communication configuration. I created my slave and master projects with cubeide and add those files to my own layer and write a recipe file for that.Here is how everything looks. I added the error log file which steps should I follow to solve this problem.
SUMMARY = "SPI Slave Application for STM32MP1"
LICENSE = "MIT"
SRC_URI = "file://slave-mp1/"
S = "${WORKDIR}/slave-mp1"
CFLAGS += "-I${S}/CM4/Core/Inc -I${S}/Drivers/STM32MP1xx_HAL_Driver/Inc -I${S}/Common/System -I${S}/Drivers/CMSIS/Device/ST/STM32MP1xx/Include"
LDFLAGS += "-L${S}/CM4/Core/Src"
do_compile() {
${CC} ${CFLAGS} ${LDFLAGS} \
-o ${B}/spicom_slave \
${S}/CM4/Core/Src/main.c \
${S}/CM4/Core/Src/stm32mp1xx_hal_msp.c \
${S}/CM4/Core/Src/stm32mp1xx_it.c \
${S}/CM4/Core/Src/syscalls.c \
${S}/CM4/Core/Src/sysmem.c \
${S}/Common/System/system_stm32mp1xx.c \
${S}/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_spi.c \
${S}/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_gpio.c \
${S}/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal.c \
${S}/Drivers/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_rcc.c
}
do_install() {
install -d ${D}${bindir}
install -m 0755 ${B}/spicom_slave ${D}${bindir}/spicom_slave
}
nesnes@nesnes-ABRA-A5-V19-2:~/STM32MPU-Ecosystem-v5.1.0/Distribution-Package/layers/meta-custo/recipes-app$ tree
.
└── spicom
├── files
│ └── slave-mp1
│ ├── CA7
│ │ ├── DeviceTree
│ │ │ └── slave-mp1
│ │ │ ├── kernel
│ │ │ │ └── stm32mp157f-slave-mp1-mx.dts
│ │ │ ├── optee-os
│ │ │ │ └── stm32mp157f-slave-mp1-mx.dts
│ │ │ ├── tf-a
│ │ │ │ ├── stm32mp157f-slave-mp1-mx.dts
│ │ │ │ ├── stm32mp157f-slave-mp1-mx-fw-config.dts
│ │ │ │ └── stm32mp15-mx.dtsi
│ │ │ └── u-boot
│ │ │ ├── stm32mp157f-slave-mp1-mx.dts
│ │ │ ├── stm32mp157f-slave-mp1-mx.dts.bak
│ │ │ └── stm32mp157f-slave-mp1-mx-u-boot.dtsi
│ │ └── manifest.prop
│ ├── CM4
│ │ ├── Core
│ │ │ ├── Inc
│ │ │ │ ├── main.h
│ │ │ │ ├── stm32mp1xx_hal_conf.h
│ │ │ │ └── stm32mp1xx_it.h
│ │ │ ├── Src
│ │ │ │ ├── main.c
│ │ │ │ ├── stm32mp1xx_hal_msp.c
│ │ │ │ ├── stm32mp1xx_it.c
│ │ │ │ ├── syscalls.c
│ │ │ │ └── sysmem.c
│ │ │ └── Startup
│ │ │ └── startup_stm32mp157facx.s
│ │ ├── Debug
│ │ │ ├── Common
│ │ │ │ └── System
│ │ │ │ ├── subdir.mk
│ │ │ │ ├── system_stm32mp1xx.cyclo
│ │ │ │ ├── system_stm32mp1xx.d
│ │ │ │ ├── system_stm32mp1xx.o
│ │ │ │ └── system_stm32mp1xx.su
│ │ │ ├── Core
│ │ │ │ ├── Src
│ │ │ │ │ ├── main.cyclo
│ │ │ │ │ ├── main.d
│ │ │ │ │ ├── main.o
│ │ │ │ │ ├── main.su
│ │ │ │ │ ├── stm32mp1xx_hal_msp.cyclo
│ │ │ │ │ ├── stm32mp1xx_hal_msp.d
│ │ │ │ │ ├── stm32mp1xx_hal_msp.o
│ │ │ │ │ ├── stm32mp1xx_hal_msp.su
│ │ │ │ │ ├── stm32mp1xx_it.cyclo
│ │ │ │ │ ├── stm32mp1xx_it.d
│ │ │ │ │ ├── stm32mp1xx_it.o
│ │ │ │ │ ├── stm32mp1xx_it.su
│ │ │ │ │ ├── subdir.mk
│ │ │ │ │ ├── syscalls.cyclo
│ │ │ │ │ ├── syscalls.d
│ │ │ │ │ ├── syscalls.o
│ │ │ │ │ ├── syscalls.su
│ │ │ │ │ ├── sysmem.cyclo
│ │ │ │ │ ├── sysmem.d
│ │ │ │ │ ├── sysmem.o
│ │ │ │ │ └── sysmem.su
│ │ │ │ └── Startup
│ │ │ │ ├── startup_stm32mp157facx.d
│ │ │ │ ├── startup_stm32mp157facx.o
│ │ │ │ └── subdir.mk
│ │ │ ├── Drivers
│ │ │ │ └── STM32MP1xx_HAL_Driver
│ │ │ │ ├── stm32mp1xx_hal_cortex.cyclo
│ │ │ │ ├── stm32mp1xx_hal_cortex.d
│ │ │ │ ├── stm32mp1xx_hal_cortex.o
│ │ │ │ ├── stm32mp1xx_hal_cortex.su
│ │ │ │ ├── stm32mp1xx_hal.cyclo
│ │ │ │ ├── stm32mp1xx_hal.d
│ │ │ │ ├── stm32mp1xx_hal_dma.cyclo
│ │ │ │ ├── stm32mp1xx_hal_dma.d
│ │ │ │ ├── stm32mp1xx_hal_dma_ex.cyclo
│ │ │ │ ├── stm32mp1xx_hal_dma_ex.d
│ │ │ │ ├── stm32mp1xx_hal_dma_ex.o
│ │ │ │ ├── stm32mp1xx_hal_dma_ex.su
│ │ │ │ ├── stm32mp1xx_hal_dma.o
│ │ │ │ ├── stm32mp1xx_hal_dma.su
│ │ │ │ ├── stm32mp1xx_hal_exti.cyclo
│ │ │ │ ├── stm32mp1xx_hal_exti.d
│ │ │ │ ├── stm32mp1xx_hal_exti.o
│ │ │ │ ├── stm32mp1xx_hal_exti.su
│ │ │ │ ├── stm32mp1xx_hal_gpio.cyclo
│ │ │ │ ├── stm32mp1xx_hal_gpio.d
│ │ │ │ ├── stm32mp1xx_hal_gpio.o
│ │ │ │ ├── stm32mp1xx_hal_gpio.su
│ │ │ │ ├── stm32mp1xx_hal_hsem.cyclo
│ │ │ │ ├── stm32mp1xx_hal_hsem.d
│ │ │ │ ├── stm32mp1xx_hal_hsem.o
│ │ │ │ ├── stm32mp1xx_hal_hsem.su
│ │ │ │ ├── stm32mp1xx_hal_mdma.cyclo
│ │ │ │ ├── stm32mp1xx_hal_mdma.d
│ │ │ │ ├── stm32mp1xx_hal_mdma.o
│ │ │ │ ├── stm32mp1xx_hal_mdma.su
│ │ │ │ ├── stm32mp1xx_hal.o
│ │ │ │ ├── stm32mp1xx_hal_pwr.cyclo
│ │ │ │ ├── stm32mp1xx_hal_pwr.d
│ │ │ │ ├── stm32mp1xx_hal_pwr_ex.cyclo
│ │ │ │ ├── stm32mp1xx_hal_pwr_ex.d
│ │ │ │ ├── stm32mp1xx_hal_pwr_ex.o
│ │ │ │ ├── stm32mp1xx_hal_pwr_ex.su
│ │ │ │ ├── stm32mp1xx_hal_pwr.o
│ │ │ │ ├── stm32mp1xx_hal_pwr.su
│ │ │ │ ├── stm32mp1xx_hal_rcc.cyclo
│ │ │ │ ├── stm32mp1xx_hal_rcc.d
│ │ │ │ ├── stm32mp1xx_hal_rcc_ex.cyclo
│ │ │ │ ├── stm32mp1xx_hal_rcc_ex.d
│ │ │ │ ├── stm32mp1xx_hal_rcc_ex.o
│ │ │ │ ├── stm32mp1xx_hal_rcc_ex.su
│ │ │ │ ├── stm32mp1xx_hal_rcc.o
│ │ │ │ ├── stm32mp1xx_hal_rcc.su
│ │ │ │ ├── stm32mp1xx_hal_spi.cyclo
│ │ │ │ ├── stm32mp1xx_hal_spi.d
│ │ │ │ ├── stm32mp1xx_hal_spi_ex.cyclo
│ │ │ │ ├── stm32mp1xx_hal_spi_ex.d
│ │ │ │ ├── stm32mp1xx_hal_spi_ex.o
│ │ │ │ ├── stm32mp1xx_hal_spi_ex.su
│ │ │ │ ├── stm32mp1xx_hal_spi.o
│ │ │ │ ├── stm32mp1xx_hal_spi.su
│ │ │ │ ├── stm32mp1xx_hal.su
│ │ │ │ ├── stm32mp1xx_hal_tim.cyclo
│ │ │ │ ├── stm32mp1xx_hal_tim.d
│ │ │ │ ├── stm32mp1xx_hal_tim_ex.cyclo
│ │ │ │ ├── stm32mp1xx_hal_tim_ex.d
│ │ │ │ ├── stm32mp1xx_hal_tim_ex.o
│ │ │ │ ├── stm32mp1xx_hal_tim_ex.su
│ │ │ │ ├── stm32mp1xx_hal_tim.o
│ │ │ │ ├── stm32mp1xx_hal_tim.su
│ │ │ │ └── subdir.mk
│ │ │ ├── makefile
│ │ │ ├── objects.list
│ │ │ ├── objects.mk
│ │ │ ├── slave-mp1_CM4.elf
│ │ │ ├── slave-mp1_CM4.list
│ │ │ ├── slave-mp1_CM4.map
│ │ │ └── sources.mk
│ │ ├── Drivers
│ │ │ └── STM32MP1xx_HAL_Driver
│ │ ├── RemoteProc
│ │ │ ├── fw_cortex_m4.sh
│ │ │ └── README
│ │ ├── slave-mp1_CM4 Debug.cfg
│ │ ├── slave-mp1_CM4 Debug.launch
│ │ └── STM32MP157FACX_RAM.ld
│ ├── Common
│ │ └── System
│ │ └── system_stm32mp1xx.c
│ ├── Drivers
│ │ ├── CMSIS
│ │ │ ├── Device
│ │ │ │ └── ST
│ │ │ │ └── STM32MP1xx
│ │ │ │ ├── Include
│ │ │ │ │ ├── stm32mp157fxx_cm4.h
│ │ │ │ │ ├── stm32mp1xx.h
│ │ │ │ │ └── system_stm32mp1xx.h
│ │ │ │ ├── LICENSE.txt
│ │ │ │ └── Source
│ │ │ │ └── Templates
│ │ │ ├── Include
│ │ │ │ ├── cmsis_armcc.h
│ │ │ │ ├── cmsis_armclang.h
│ │ │ │ ├── cmsis_armclang_ltm.h
│ │ │ │ ├── cmsis_compiler.h
│ │ │ │ ├── cmsis_gcc.h
│ │ │ │ ├── cmsis_iccarm.h
│ │ │ │ ├── cmsis_version.h
│ │ │ │ ├── core_armv81mml.h
│ │ │ │ ├── core_armv8mbl.h
│ │ │ │ ├── core_armv8mml.h
│ │ │ │ ├── core_cm0.h
│ │ │ │ ├── core_cm0plus.h
│ │ │ │ ├── core_cm1.h
│ │ │ │ ├── core_cm23.h
│ │ │ │ ├── core_cm33.h
│ │ │ │ ├── core_cm35p.h
│ │ │ │ ├── core_cm3.h
│ │ │ │ ├── core_cm4.h
│ │ │ │ ├── core_cm7.h
│ │ │ │ ├── core_sc000.h
│ │ │ │ ├── core_sc300.h
│ │ │ │ ├── mpu_armv7.h
│ │ │ │ ├── mpu_armv8.h
│ │ │ │ └── tz_context.h
│ │ │ └── LICENSE.txt
│ │ └── STM32MP1xx_HAL_Driver
│ │ ├── Inc
│ │ │ ├── Legacy
│ │ │ │ └── stm32_hal_legacy.h
│ │ │ ├── stm32mp1xx_hal_cortex.h
│ │ │ ├── stm32mp1xx_hal_def.h
│ │ │ ├── stm32mp1xx_hal_dma_ex.h
│ │ │ ├── stm32mp1xx_hal_dma.h
│ │ │ ├── stm32mp1xx_hal_exti.h
│ │ │ ├── stm32mp1xx_hal_gpio_ex.h
│ │ │ ├── stm32mp1xx_hal_gpio.h
│ │ │ ├── stm32mp1xx_hal.h
│ │ │ ├── stm32mp1xx_hal_hsem.h
│ │ │ ├── stm32mp1xx_hal_mdma.h
│ │ │ ├── stm32mp1xx_hal_pwr_ex.h
│ │ │ ├── stm32mp1xx_hal_pwr.h
│ │ │ ├── stm32mp1xx_hal_rcc_ex.h
│ │ │ ├── stm32mp1xx_hal_rcc.h
│ │ │ ├── stm32mp1xx_hal_spi_ex.h
│ │ │ ├── stm32mp1xx_hal_spi.h
│ │ │ ├── stm32mp1xx_hal_tim_ex.h
│ │ │ ├── stm32mp1xx_hal_tim.h
│ │ │ ├── stm32mp1xx_ll_bus.h
│ │ │ ├── stm32mp1xx_ll_dma.h
│ │ │ ├── stm32mp1xx_ll_dmamux.h
│ │ │ ├── stm32mp1xx_ll_exti.h
│ │ │ ├── stm32mp1xx_ll_gpio.h
│ │ │ ├── stm32mp1xx_ll_hsem.h
│ │ │ ├── stm32mp1xx_ll_pwr.h
│ │ │ ├── stm32mp1xx_ll_rcc.h
│ │ │ ├── stm32mp1xx_ll_system.h
│ │ │ └── stm32mp1xx_ll_utils.h
│ │ ├── LICENSE.txt
│ │ └── Src
│ │ ├── stm32mp1xx_hal.c
│ │ ├── stm32mp1xx_hal_cortex.c
│ │ ├── stm32mp1xx_hal_dma.c
│ │ ├── stm32mp1xx_hal_dma_ex.c
│ │ ├── stm32mp1xx_hal_exti.c
│ │ ├── stm32mp1xx_hal_gpio.c
│ │ ├── stm32mp1xx_hal_hsem.c
│ │ ├── stm32mp1xx_hal_mdma.c
│ │ ├── stm32mp1xx_hal_pwr.c
│ │ ├── stm32mp1xx_hal_pwr_ex.c
│ │ ├── stm32mp1xx_hal_rcc.c
│ │ ├── stm32mp1xx_hal_rcc_ex.c
│ │ ├── stm32mp1xx_hal_spi.c
│ │ ├── stm32mp1xx_hal_spi_ex.c
│ │ ├── stm32mp1xx_hal_tim.c
│ │ └── stm32mp1xx_hal_tim_ex.c
│ └── slave-mp1.ioc
└── spicom.bb
41 directories, 202 files
2024-08-27 01:20 AM
nesnes@nesnes-ABRA-A5-V19-2:~/STM32MPU-Ecosystem-v5.1.0/Distribution-Package/layers/meta-custo/recipes-app/spicom/files/slave-mp1/Drivers/STM32MP1xx_HAL_Driver/Inc$ ls
Legacy stm32mp1xx_hal_mdma.h stm32mp1xx_ll_dma.h
stm32mp1xx_hal_cortex.h stm32mp1xx_hal_pwr_ex.h stm32mp1xx_ll_dmamux.h
stm32mp1xx_hal_def.h stm32mp1xx_hal_pwr.h stm32mp1xx_ll_exti.h
stm32mp1xx_hal_dma_ex.h stm32mp1xx_hal_rcc_ex.h stm32mp1xx_ll_gpio.h
stm32mp1xx_hal_dma.h stm32mp1xx_hal_rcc.h stm32mp1xx_ll_hsem.h
stm32mp1xx_hal_exti.h stm32mp1xx_hal_spi_ex.h stm32mp1xx_ll_pwr.h
stm32mp1xx_hal_gpio_ex.h stm32mp1xx_hal_spi.h stm32mp1xx_ll_rcc.h
stm32mp1xx_hal_gpio.h stm32mp1xx_hal_tim_ex.h stm32mp1xx_ll_system.h
stm32mp1xx_hal.h stm32mp1xx_hal_tim.h stm32mp1xx_ll_utils.h
stm32mp1xx_hal_hsem.h stm32mp1xx_ll_bus.h
nesnes@nesnes-ABRA-A5-V19-2:~/STM32MPU-Ecosystem-v5.1.0/Distribution-Package/layers/meta-custo/recipes-app/spicom/files/slave-mp1/Drivers/STM32MP1xx_HAL_Driver/Inc$ grep -r "RCC_MSSCKSELR_MCUSSRC" .
grep -r "RCC_ASSCKSELR_AXISSRC_1" .
grep -r "RCC_HSICFGR_HSIDIV" .
./stm32mp1xx_hal_rcc.h:#define RCC_MCUSSOURCE_HSE RCC_MSSCKSELR_MCUSSRC_0
./stm32mp1xx_hal_rcc.h:#define RCC_MCUSSOURCE_CSI RCC_MSSCKSELR_MCUSSRC_1
./stm32mp1xx_hal_rcc.h:#define RCC_MCUSSOURCE_PLL3 (RCC_MSSCKSELR_MCUSSRC_1 | RCC_MSSCKSELR_MCUSSRC_0)
./stm32mp1xx_hal_rcc.h:#define RCC_FLAG_MCUSSRCRDY ( (RCC->MSSCKSELR & RCC_MSSCKSELR_MCUSSRCRDY) == RCC_MSSCKSELR_MCUSSRCRDY )
./stm32mp1xx_hal_rcc.h: do{ MODIFY_REG( RCC->MSSCKSELR, RCC_MSSCKSELR_MCUSSRC , (__RCC_MCUSSOURCE__));\
./stm32mp1xx_hal_rcc.h:#define __HAL_RCC_GET_MCU_SOURCE() ((uint32_t)(RCC->MSSCKSELR & RCC_MSSCKSELR_MCUSSRC))
./stm32mp1xx_ll_rcc.h:#define LL_RCC_MCUSS_CLKSOURCE_HSE RCC_MSSCKSELR_MCUSSRC_0 /*!< HSE selection as MCUSS clock */
./stm32mp1xx_ll_rcc.h:#define LL_RCC_MCUSS_CLKSOURCE_CSI RCC_MSSCKSELR_MCUSSRC_1 /*!< CSI selection as MCUSS clock */
./stm32mp1xx_ll_rcc.h:#define LL_RCC_MCUSS_CLKSOURCE_PLL3 (RCC_MSSCKSELR_MCUSSRC_1 | RCC_MSSCKSELR_MCUSSRC_0) /*!< PLL3 selection as MCUSS clock */
./stm32mp1xx_ll_rcc.h:#define LL_RCC_MCUSS_CLKSOURCE_STATUS_HSE RCC_MSSCKSELR_MCUSSRC_0 /*!< HSE used as MCUSS clock */
./stm32mp1xx_ll_rcc.h:#define LL_RCC_MCUSS_CLKSOURCE_STATUS_CSI RCC_MSSCKSELR_MCUSSRC_1 /*!< CSI used as MCUSS clock */
./stm32mp1xx_ll_rcc.h:#define LL_RCC_MCUSS_CLKSOURCE_STATUS_PLL3 (RCC_MSSCKSELR_MCUSSRC_1 | RCC_MSSCKSELR_MCUSSRC_0) /*!< PLL3 used as MCUSS clock */
./stm32mp1xx_ll_rcc.h: MODIFY_REG(RCC->MSSCKSELR, RCC_MSSCKSELR_MCUSSRC, Source);
./stm32mp1xx_ll_rcc.h: return (uint32_t)(READ_BIT(RCC->MSSCKSELR, RCC_MSSCKSELR_MCUSSRC));
./stm32mp1xx_hal_rcc.h:#define RCC_AXISSOURCE_PLL2 RCC_ASSCKSELR_AXISSRC_1
./stm32mp1xx_hal_rcc.h:#define RCC_AXISSOURCE_OFF (RCC_ASSCKSELR_AXISSRC_1 | RCC_ASSCKSELR_AXISSRC_0)
./stm32mp1xx_ll_rcc.h:#define LL_RCC_AXISS_CLKSOURCE_PLL2 RCC_ASSCKSELR_AXISSRC_1 /*!< PLL2 selection as AXISS clock */
./stm32mp1xx_ll_rcc.h:#define LL_RCC_AXISS_CLKSOURCE_OFF (RCC_ASSCKSELR_AXISSRC_1 | RCC_ASSCKSELR_AXISSRC_0) /*!< AXISS is gated */
./stm32mp1xx_ll_rcc.h:#define LL_RCC_AXISS_CLKSOURCE_STATUS_PLL2 RCC_ASSCKSELR_AXISSRC_1 /*!< PLL2 used as AXISS clock */
./stm32mp1xx_ll_rcc.h:#define LL_RCC_AXISS_CLKSOURCE_STATUS_OFF (RCC_ASSCKSELR_AXISSRC_1 | RCC_ASSCKSELR_AXISSRC_0) /*!< AXISS is gated */
./stm32mp1xx_hal_rcc.h:#define RCC_HSI_DIV2 RCC_HSICFGR_HSIDIV_0 /* Division by 2, ck_hsi(_ker) = 32 MHz*/
./stm32mp1xx_hal_rcc.h:#define RCC_HSI_DIV4 RCC_HSICFGR_HSIDIV_1 /* Division by 4, ck_hsi(_ker) = 16 MHz*/
./stm32mp1xx_hal_rcc.h:#define RCC_HSI_DIV8 (RCC_HSICFGR_HSIDIV_0 | RCC_HSICFGR_HSIDIV_1) /* Division by 8, ck_hsi(_ker) = 8 MHz*/
./stm32mp1xx_hal_rcc.h: do{ MODIFY_REG( RCC->HSICFGR, RCC_HSICFGR_HSIDIV , (__RCC_HSIDIV__) );\
./stm32mp1xx_hal_rcc.h:#define __HAL_RCC_GET_HSI_DIV() ((uint32_t)(RCC->HSICFGR & RCC_HSICFGR_HSIDIV ))
./stm32mp1xx_ll_rcc.h:#define LL_RCC_HSI_DIV_2 RCC_HSICFGR_HSIDIV_0
./stm32mp1xx_ll_rcc.h:#define LL_RCC_HSI_DIV_4 RCC_HSICFGR_HSIDIV_1
./stm32mp1xx_ll_rcc.h:#define LL_RCC_HSI_DIV_8 (RCC_HSICFGR_HSIDIV_0 | RCC_HSICFGR_HSIDIV_1)