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Cannot connect J-TAG after programming chip once (and then power cycling)

Grizz
Associate III

STM32Cube IDE w/ STM32L562QEIX part - generated a .IOC to match my hardware. Have a Sky High eMMC 8-bit part configured to use the eMMC/SD peripheral in 8-bit mode. Also using FS USB CDC as another large peripheral. I can program/debug the chip with my Segger probe up until I power down the probe and UUT for the the night. Once that happens I can no longer connect J-TAG, I get an unable to power up DAP error. I have the J-TAQG fully configured to use the full 5 pins as it performs better than SWD for debugging. I set the HAL Settings "Set all free pins as analog (to optimize power consumption). Is there a bug or quirk here? Does this disable my J-TAG? If not what did? And why only after a power cycle? I've bricked two chips and am on a third. It's consistent. I want J-TAG enabled while I am developing.

10 REPLIES 10
Grizz
Associate III

Other observation, I powered the j-tag first, then the UUT. It connects better this way. Works 4 out 5 attempts. Curious...