2025-03-12 5:01 PM - last edited on 2025-03-12 5:41 PM by Andrew Neil
Pin Name | Pad/Ball | Length Delta | Conclusion / Notes: |
DSI Interface: | |||
DSI_CKP | B4 | 207 | Therefor: Pin length of A4 (the Outer pin) is 207um longer than B4s (the Inner pin) |
DSI_CKN | A4 | Conclusion: This agrees with the statements in Section 8.19. | |
DSI_D0P | B5 | 57 | Therefor: Pin length of A5 (the Outer pin) is 57um longer than B5s (the Inner pin) |
DSI_D0N | A5 | Conclusion: This agrees with the statements in Section 8.19. | |
DSI_D1P | B6 | -366 | Therefor: Pin length of A6 (the Outer pin) is 366um Shorter than B5s (the Inner pin) |
DSI_D1N | A6 | Conclusion: This is worse for PCB length tuning and Contrasts with the statements in Section 8.19. | |
* There are no information, regarding the length tuning for DSI Diff Pairs: DSI_2P/N & DSI_3P/N. Is this missing? | |||
Pin Name | Pad/Ball | Length Delta | Conclusion / Notes: |
CSI Interface: | |||
CSI_CKP | C1 | 147 | Therefor: Pin length of C1 (the Outer pin) is 147um Shorter than C2s (the Inner pin). |
CSI_CKN | C2 | Conclusion: This is worse for PCB length tuning and Contrasts with the statements in Section 8.19. | |
CSI_D0P | E2 | -450 | Therefor: Pin length of E1 (the Outer pin) is 450um Shorter than E2s (the Inner pin). |
CSI_D0N | E1 | Conclusion: This is worse for PCB length tuning and Contrasts with the statements in Section 8.19. | |
CSI_D1P | D1 | 162 | Therefor: Pin length of D1 (the Outer pin) is 162um Shorter than D2s (the Inner pin). |
CSI_D1N | D2 | Conclusion: This is worse for PCB length tuning and Contrasts with the statements in Section 8.19. | |
Pin Name | Pad/Ball | Length Delta | Conclusion / Notes: |
USB Interface: | |||
USBH_HS_DP | W11 | -11 | Therefor: Pin length of W11 (the Outer pin) is 11um longer than V11s (the Inner pin). |
USBH_HS_DM | V11 | Conclusion: This agrees with the statements in Section 8.19. | |
USB3DR_DP | W12 | 27 | Therefor: Pin length of W12 (the Outer pin) is 27um Shorter than V12s (the Inner pin). |
USB3DR_DM | V12 | Conclusion: This is worse for PCB length tuning and Contrasts with the statements in Section 8.19. | |
Pin Name | Pad/Ball | Length Delta | Conclusion / Notes: |
COMBOPHY Interface: | |||
COMBOPHY_TX1P | U15 | 336 | Therefor: Pin length of V15 (the Outer pin) is 336um longer than U15s (the Inner pin). |
COMBOPHY_TX1N | V15 | Conclusion: This agrees with the statements in Section 8.19. | |
COMBOPHY_RX1P | U16 | -191 | Therefor: Pin length of V16 (the Outer pin) is 191um Shorter than U16s (the Inner pin). |
COMBOPHY_RX1N | V16 | Conclusion: This is worse for PCB length tuning and Contrasts with the statements in Section 8.19. | |
*Note: LVDS interface not included for brevity…* |
2025-03-13 12:36 AM
HI @JHardestEE
You question make sense and we already got similar from other customers.
I agree the description is somewhat fuzzy or confusing.
The AN5489 is already planned to be updated in an upcoming release.
The paragraph:
"Each package has been optimized to provide easier length matching when differential balls pair signals are not directly on adjacent balls. Example: package with 0.8 mm ball pitch, when differential pairs are on two different
rows, the package already have around 800 μm length internal difference to allow the PCB track to match total length with minimum or even no additional routing complexity. Following table shows (for example, xN minus xP) length difference (inside package) at ball level to be taken into account by the PCB tool."
will be simplify into:
"When possible, each package has been optimized to provide easier length matching when differential balls pair signals are not directly on adjacent balls. Following table shows internal package track length difference xP minus xN/xM at ball level to be taken into account by the PCB tool."
Note the correction of "xN minus xP" in "xP minus xN/xM"
Drawing will be corrected accordingly (sign will changes for the green and the yellow ones).
example, a negative value mean the internal track length of P is longer than internal track length of N (e.g. ideal value for the blue).This mean the PCB track length of P will be shorter than the PCB track length of N.
On some packages, the package inner length was not ideal due to other constrains (so might need more length compensation on PCB), this is why you could see some values not according to drawing (in length and in sign).
Anyway, for differential routing, we have seen that is is more important to route a pair in a good differential way than focus on very strong alignment of length (+/-5 mils is quite challenging).
Furthermore, DSI data were missing for D2 and D3, here are the values:
As a working reference, you could also look at STM32MP257F-DK or STM32MP257F-EV1 design files.
Regards,