2023-01-07 10:54 AM
Hi,
how to compile fsbl to test ddr3 purposes. Unfortunately, I can't use the official one due to different UART4 debug pins and I2C4 PMIC. I can't find a good link with simple instructions. Maybe someone gives me a link or short instructions on how to compile U-Boot SPL to test/tune ddr3.
Thanks
BR Michal
2023-01-09 07:39 AM
Hi @Michał Wołowik
On latest deliveries (v4.x), uBoot SPL is not recommended for DDR tests purposes.
Instead, a new dedicated tool is now available :https://wiki.st.com/stm32mpu/wiki/STM32DDRFW-UTIL_release_note
See also https://github.com/STMicroelectronics/STM32DDRFW-UTIL/blob/main/README.md
Regards.
2023-01-09 08:13 AM
Thanks Patrick
I try and give feedback.
BR Michal