2022-11-16 09:05 PM
Hi Team,
We are trying to boot the STM32MP157A-EV1 board with our eMMC device, but it is booting intermittently.
As per our debugging the failure case, eMMC device will respond ACK within ~15ms but ROM code disable the CLK in ~50ms(before downloading the data).
Is there any OTP configuration required for ROM code to wait more than 50ms.
2022-11-17 12:01 AM
Hi @GDhan.1
please confirm my understanding.
You are using STM32MP157A-EV1 board with a different eMMC than the one fitted originally (which should be Toshiba THGBMNG5D1LBAIL).
Please provide the STM32MP15 revision (written on the package or display on console during boot/flashing) and the reference of the eMMC you are using.
Please note that the board you have in hand is likely using 'old' STM32MP157A revision 'B' which does not work will with most of the eMMC (due to wrong data timeout as you noticed).
There is no workaround except using few specific eMMC brands/models which was proven to work (like the Toshiba one).
Currently produced STM32MP15x products (from probably more than 2 years) are revision 'Z' and does not have this issue anymore. Supports of all eMMC models sticking to related JEDEC standard is ensured.
See ES0438 for details.
Regards,
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2022-11-17 01:16 AM
Hi Patrick,
Thanks for the clarification.
Can you please share the revision 'Z' product link.
Regards,
Ganapathi
2022-11-17 01:31 AM
Both B and Z products share same documentation and same errata sheet (but Rev.Z have less limitations). For latest documentation, please look at https://www.st.com/en/microcontrollers-microprocessors/stm32mp157a.html
For evaluation board using Rev.Z, see STM32MP157D-EV1
In our production lines, 'Rev.B' has been displaced by 'Rev.Z' more than 2 years ago, but in those shortage times, there might be some old stocks which could pop out from distributors or brokers.
Regards,
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2022-11-17 01:54 AM
Hi,
Referred ES0438 regarding eMMC boot failure. Can you please confirm below eMMC boot failure issue also fixed on Rev.Z?
Regards,
Ganapathi
2022-11-17 02:42 AM
Hi,
Yes, this one also is corrected.
All information about limitation presence on each revision are in ES0438 Table 3
Regards,
2022-11-24 08:50 AM
Hi @GDhan.1 ,
could you please confirm your issue was due to STM32MP157A Rev.B limitation with the eMMC device you are using ?
Could you share the eMMC brand and part number you have tried ?
Regards.
2023-05-14 09:42 PM
Hi @PatrickF,
We purchased latest STM32MP1(STM32MP157DAA1 MPU SOC) Rev. Z samples and tested with existing STM32MP157A-EV1 board.
But getting DDR3 access issue after soldering the new SoC(STM32MP157DAA Rev.Z) chip for all boot modes(NOR, NAND, MMC, EMMC & USB). As per datasheet MPUSS_CLK frequency will be different for STM32MP157 A/D package. Can you please help us to resolve this error.
UART console debug log:
NOTICE: CPU: STM32MP157DAA Rev.Z
NOTICE: Model: STMicroelectronics STM32MP157A eval daughter on eval mother
INFO: PMIC version = 0x10
INFO: Reset reason (0x15):
INFO: Power-on Reset (rst_por)
INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000
INFO: FCONF: Reading firmware configuration information for: stm32mp_io
INFO: Using EMMC
INFO: Instance 2
INFO: Boot used partition fsbl1
NOTICE: BL2: v2.6-stm32mp1-r1.0(debug):v2.6-dirty
NOTICE: BL2: Built : 13:14:26, Nov 23 2021
INFO: BL2: Doing platform setup
INFO: RAM: DDR3-DDR3L 32bits 533000kHz
ERROR: DDR addr bus test: can't access memory @ 0xc0000004
PANIC at PC : 0x2ffeba61
Exception mode=0x00000016 at: 0x2ffeba61
Regards,
Ganapathi