STM32MP15: How do we set I2C6 clock source ?

[Dat Tran]

I am using STM32CubeMx to generate device tree:

I got these in uboot device tree:

&rcc {

st,clksrc=<

CLK_MPU_PLL1P

CLK_AXI_PLL2P

CLK_MCU_PLL3P

CLK_PLL12_HSE

CLK_PLL3_HSE

CLK_PLL4_HSE

CLK_RTC_LSE

CLK_MCO1_HSI

CLK_MCO2_DISABLED

>;

st,clkdiv = <

1 /*MPU*/

0 /*AXI*/

0 /*MCU*/

1 /*APB1*/

1 /*APB2*/

1 /*APB3*/

1 /*APB4*/

2 /*APB5*/

23 /*RTC*/

3 /*MCO1*/

0 /*MCO2*/

>;

st,pkcs = <

CLK_CKPER_HSE

CLK_FMC_ACLK

CLK_QSPI_ACLK

CLK_ETH_DISABLED

CLK_SDMMC12_PLL4P

CLK_DSI_DSIPLL

CLK_STGEN_HSE

CLK_USBPHY_PLL4R

CLK_SPI2S1_PLL3Q

CLK_SPI2S23_PLL3Q

CLK_SPI45_HSI

CLK_SPI6_HSI

CLK_I2C46_HSI

CLK_SDMMC3_PLL4P

CLK_USBO_USBPHY

CLK_ADC_CKPER

CLK_CEC_LSE

CLK_I2C12_HSI

CLK_I2C35_HSI

CLK_UART1_HSI

CLK_UART24_HSI

CLK_UART35_HSI

CLK_UART6_HSI

CLK_UART78_HSI

CLK_SPDIF_PLL4P

CLK_FDCAN_PLL4R

CLK_SAI1_PLL3Q

CLK_SAI2_PLL3Q

CLK_SAI3_PLL3Q

CLK_SAI4_PLL3Q

CLK_RNG1_LSI

CLK_RNG2_LSI

CLK_LPTIM1_PCLK1

CLK_LPTIM23_PCLK3

CLK_LPTIM45_LSE

>;

....

};

I can see I2C6 is using HSI for clock source, UART1,2,3,4... also use HSI.

In linux, when I open UART, then check register RCC_OCENSETR , HSI bit is 1, mean HSI is on. This is good.

but if I open I2C6 only,  check register RCC_OCENSETR, bit 1 now is 0, mean HSI is disable. But I2C6 work fine.

My question is, is there any where overwrite these values? My device has only uboot and linux, no trusted or optee... and I don't see any where reset these values yet.

[PatrickF]

Hi @Dat Tran 

bit 1 of RCC_OCENSETR  is HSIKERON. Required to keep clock in xxx-Stop mode, but no impact when processor is running.
HSION is bit0

I assume HSIKERON is related to wakeup settings for used peripherals.

Note: Only OpTee is supported in latest OpenSTLinux ecosystem. We strongly advice to go in that way to benefit from future ecosystem updates.

Regards.