Reallocation of SRAM memory to STM32MP157A

[AlexandrShipovsky]

Hi everyone!

By default, the linker file describes that the memory partitions are configured as:

1. RETRAM - ISR Vector;
2. SRAM1 - Code;
3. SRAM2 - Data;
4. SRAM3 - buffer IPC;
5. SRAM4 - not used in .ld file, but in device tree it's DMA1/DMA2 buffer.

My application does not need DMA buffers and I want to use this memory efficiently, namely:

1. RETRAM - ISR Vector;
2. SRAM1+SRAM2 - Code;
3. SRAM3 - Data;
4. SRAM4 - buffer IPC;

To do this, I change the linker file accordingly:

/**
 ******************************************************************************
 * @file      LinkerScript.ld
 * @author    Auto-generated by STM32CubeIDE
 *  Abstract    : Linker script for STM32MP157A-DK1 Board embedding STM32MP157AACx Device from STM32MP1 series
 *                      128Kbytes FLASH
 *                      128Kbytes RAM1
 *                      128Kbytes RAM2
 *
 *            Set heap size, stack size and stack location according
 *            to application requirements.
 *
 *            Set memory bank area and size if external memory is used
 ******************************************************************************
 * @attention
 *
 * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
 * All rights reserved.</center></h2>
 *
 * This software component is licensed by ST under BSD 3-Clause license,
 * the "License"; You may not use this file except in compliance with the
 * License. You may obtain a copy of the License at:
 *                        opensource.org/licenses/BSD-3-Clause
 *
 ******************************************************************************
 */
 
/* Entry Point */
ENTRY(Reset_Handler)
 
/* Highest address of the user mode stack */
_estack = ORIGIN(SRAM3) + LENGTH(SRAM3);	/* end of "SRAM3" Ram type memory */
 
_Min_Heap_Size = 0x200 ;	/* required amount of heap  */
_Min_Stack_Size = 0x400 ;	/* required amount of stack */
 
/* Memories definition */
MEMORY
{
  RETRAM		(xrw)	: ORIGIN = 0x00000000,	LENGTH = 64K
  SRAM12		(rx)	: ORIGIN = 0x10000000,	LENGTH = 256K
  SRAM3		(xrw)	: ORIGIN = 0x10040000,	LENGTH = 64K
  SRAM4		(xrw)	: ORIGIN = 0x10050000,	LENGTH = 64K
}
 
 /* Symbols needed for OpenAMP to enable rpmsg */
__OPENAMP_region_start__  = ORIGIN(SRAM4);
__OPENAMP_region_end__ = ORIGIN(SRAM4)+LENGTH(SRAM4);
 
/* Sections */
SECTIONS
{
  /* The startup code into "RETRAM" Ram type memory */
  .isr_vector :
  {
    . = ALIGN(4);
    KEEP(*(.isr_vector)) /* Startup code */
    . = ALIGN(4);
  } >RETRAM
 
  /* The program code and other data into "SRAM1" Rom type memory */
  .text :
  {
    . = ALIGN(4);
    *(.text)           /* .text sections (code) */
    *(.text*)          /* .text* sections (code) */
    *(.glue_7)         /* glue arm to thumb code */
    *(.glue_7t)        /* glue thumb to arm code */
    *(.eh_frame)
 
    KEEP (*(.init))
    KEEP (*(.fini))
 
    . = ALIGN(4);
    _etext = .;        /* define a global symbols at end of code */
  } >SRAM12
 
  /* Constant data into "SRAM1" Rom type memory */
  .rodata :
  {
    . = ALIGN(4);
    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
    . = ALIGN(4);
  } >SRAM12
 
  .ARM.extab   : {
  	. = ALIGN(4);
  	*(.ARM.extab* .gnu.linkonce.armextab.*)
  	. = ALIGN(4);
  } >SRAM12
 
  .ARM : {
    . = ALIGN(4);
    __exidx_start = .;
    *(.ARM.exidx*)
    __exidx_end = .;
    . = ALIGN(4);
  } >SRAM12
 
  .preinit_array     :
  {
    . = ALIGN(4);
    PROVIDE_HIDDEN (__preinit_array_start = .);
    KEEP (*(.preinit_array*))
    PROVIDE_HIDDEN (__preinit_array_end = .);
    . = ALIGN(4);
  } >SRAM12
 
  .init_array :
  {
    . = ALIGN(4);
    PROVIDE_HIDDEN (__init_array_start = .);
    KEEP (*(SORT(.init_array.*)))
    KEEP (*(.init_array*))
    PROVIDE_HIDDEN (__init_array_end = .);
    . = ALIGN(4);
  } >SRAM12
 
  .fini_array :
  {
    . = ALIGN(4);
    PROVIDE_HIDDEN (__fini_array_start = .);
    KEEP (*(SORT(.fini_array.*)))
    KEEP (*(.fini_array*))
    PROVIDE_HIDDEN (__fini_array_end = .);
    . = ALIGN(4);
  } >SRAM12
 
  /* Used by the startup to initialize data */
  __DATA_ROM = .;
  _sidata = LOADADDR(.data);
 
  /* Initialized data sections into "SRAM3" Ram type memory */
  .data :  AT(__DATA_ROM)
  {
    . = ALIGN(4);
    _sdata = .;        /* create a global symbol at data start */
    *(.data)           /* .data sections */
    *(.data*)          /* .data* sections */
 
    . = ALIGN(4);
    _edata = .;        /* define a global symbol at data end */
  } >SRAM3
 
    __DATA_END = __DATA_ROM + (_edata - _sdata);
  text_end = ORIGIN(SRAM12) + LENGTH(SRAM12);
  ASSERT(__DATA_END <= text_end, "region SRAM12 overflowed with text and data")
 
 
  .resource_table :
  {
    . = ALIGN(4);
    KEEP (*(.resource_table*))
    . = ALIGN(4);
  } >SRAM3
 
  /* Uninitialized data section into "SRAM3" Ram type memory */
  . = ALIGN(4);
  .bss :
  {
    /* This is used by the startup in order to initialize the .bss secion */
    _sbss = .;         /* define a global symbol at bss start */
    __bss_start__ = _sbss;
    *(.bss)
    *(.bss*)
    *(COMMON)
 
    . = ALIGN(4);
    _ebss = .;         /* define a global symbol at bss end */
    __bss_end__ = _ebss;
  } >SRAM3
 
  /* User_heap_stack section, used to check that there is enough "SRAM3" Ram  type memory left */
  ._user_heap_stack :
  {
    . = ALIGN(8);
    PROVIDE ( end = . );
    PROVIDE ( _end = . );
    . = . + _Min_Heap_Size;
    . = . + _Min_Stack_Size;
    . = ALIGN(8);
  } >SRAM3
 
  /* Remove information from the compiler libraries */
  /DISCARD/ :
  {
    libc.a ( * )
    libm.a ( * )
    libgcc.a ( * )
  }
 
  .ARM.attributes 0 : { *(.ARM.attributes) }
}

I am also editing the device tree file(edit adress from 10040000 for IPC to 10050000 (SRAM4)):

		mcuram2:mcuram2@10000000{
			compatible = "shared-dma-pool";
			reg = <0x10000000 0x40000>;
			no-map;
		};
 
		vdev0vring0:vdev0vring0@10050000{
			compatible = "shared-dma-pool";
			reg = <0x10050000 0x1000>;
			no-map;
		};
 
		vdev0vring1:vdev0vring1@10051000{
			compatible = "shared-dma-pool";
			reg = <0x10051000 0x1000>;
			no-map;
		};
 
		vdev0buffer:vdev0buffer@10052000{
			compatible = "shared-dma-pool";
			reg = <0x10052000 0x4000>;
			no-map;
		};
 
		mcuram:mcuram@30000000{
			compatible = "shared-dma-pool";
			reg = <0x30000000 0x40000>;
			no-map;
		};
 
		retram:retram@38000000{
			compatible = "shared-dma-pool";
			reg = <0x38000000 0x10000>;
			no-map;
		};
 
		gpu_reserved:gpu@d4000000{
			reg = <0xd4000000 0x4000000>;
			no-map;
		};

And i delete it:

&sram {
    dma_pool: dma_pool@0 {
    reg = <0x50000 0x10000>;
    pool;
};

And it:

&dma1 {
	sram = <&dma_pool>;
};
 
&dma2 {
	sram = <&dma_pool>;
};

But nevertheless, my application on the M4 core runs only in engineering mode. In production mode, the application hangs in an infinite loop:

Снимок �?крана от 2021-09-07 11-28-15

[ArnaudP · Accepted solution]

Hello @AlexandrShipovsky​ 

The Cortex-M4 hangs waiting that the Linux updates the vdev status to initiate the RPMsg communication.

In a first review I see one issue in DT. You should extend MCURAM size for code+data

		mcuram2:mcuram2@10000000{
			compatible = "shared-dma-pool";
-			reg = <0x10000000 0x40000>;
+			reg = <0x10000000 0x50000>;
			no-map;
		};
 
		mcuram:mcuram@30000000{
			compatible = "shared-dma-pool";
-			reg = <0x30000000 0x40000>;
+			reg = <0x30000000 0x50000>;
			no-map;
		};

If this does not fix the issue, please could you provide the map file and/or elf file of your Cortex-M4 firmware and Linux kernel trace associated to the start of the M4 firmware?

Thanks,

Arnaud

[Kevin HUBER]

Hi @AlexandrShipovsky​ 

In order to give better visibility on the answered topics, please click on 'Select as Best' on the reply which solved your issue or answered your question. See also 'Best Answers'

Thanks,

Kevin

[AlexandrShipovsky]

It's really worked. Thank you!