2021-05-19 10:24 AM
Hi, Everybody!
Could anyone help with correct device tree for qspi-nand flash. I can't see any activity on pins connected to flash. If I try to boot from spi-nand with BOOT0..2 set to 1, I can see clear SPI transactions... So, flash connection looks correct.
Flash type is MT29F1G01ABAFDWB
Connected to following pins:
PF10 - CLK
PB6 - NCS
PF8 - IO0
PF9 - IO1
PF7 - IO2
PF6 - IO3
TF-a device tree:
pinctrl node:
qspi_bk1_pins_a: qspi-bk1-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
<STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
<STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
<STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
bias-pull-up;
drive-push-pull;
slew-rate = <1>;
};
};
qspi_clk_pins_a: qspi-clk-0 {
pins {
pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
bias-disable;
drive-push-pull;
slew-rate = <3>;
};
};
qspi node:
&qspi {
pinctrl-names = "default";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
flash0: mt29f2g01abagd@0 {
compatible = "spi-nand";
reg = <0>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
spi-max-frequency = <64000000>;
#address-cells = <1>;
#size-cells = <1>;
};
};
u-boot device tree:
qspi_clk_pins_a: qspi-clk-0 {
u-boot,dm-pre-reloc;
pins {
u-boot,dm-pre-reloc;
pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
bias-disable;
drive-push-pull;
slew-rate = <3>;
};
};
qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
u-boot,dm-pre-reloc;
pins {
u-boot,dm-pre-reloc;
pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
};
};
qspi_bk1_pins_a: qspi-bk1-0 {
u-boot,dm-pre-reloc;
pins1 {
u-boot,dm-pre-reloc;
pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
<STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
<STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
<STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
u-boot,dm-pre-reloc;
pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
bias-pull-up;
drive-push-pull;
slew-rate = <1>;
};
};
qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
u-boot,dm-pre-reloc;
pins {
u-boot,dm-pre-reloc;
pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
<STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
<STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
<STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
<STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
};
};
&qspi {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
flash0: mt29f2g01abagd@0 {
compatible = "spi-nand";
reg = <0>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
spi-max-frequency = <64000000>;
#address-cells = <1>;
#size-cells = <1>;
};
};
U-boot output:
U-Boot 2020.01-stm32mp-r1 (Jan 06 2020 - 20:56:31 +0000)
CPU: STM32MP157DAB Rev.Z
Model: STMicroelectronics STM32MP157A-DK1 STM32CubeMX board
Board: stm32mp1 in trusted mode (st,stm32mp157a-stm32mp151-dk1-mx)
DRAM: 512 MiB
Clocks:
- MPU : 800 MHz
- MCU : 208.878 MHz
- AXI : 266.500 MHz
- PER : 24 MHz
- DDR : 533 MHz
WDT: Started with servicing (32s timeout)
NAND: 0 MiB
MMC: STM32 SD/MMC: 0
In: serial
Out: serial
Err: serial
invalid MAC address in OTP 00:00:00:00:00:00
stm32 vrefbuf timed out: -110
adc@0: can't enable vdd-supply!board_check_usb_power: single shot failed for adc@0[18]!
Net:
Error: ethernet@5800a000 address not set.
No ethernet found.
Hit any key to stop autoboot: 0
Boot over usb0!
unknown raw ID d7f41b58
Error: MTD device spi-nand0 not found
DFU alt info setting: done
crq->brequest:0x0
Reset requested
#
UPLOAD ... done
Ctrl+C to exit ...
I'm completely stucked here...
Looking forward for any hints and suggestions.
Thank you in advance
Looking forward for your reply
2021-05-25 08:47 AM
Hi,
please check if you have the CLK_QSPI_ACLK in the &rcc node (TF-A Device Tree).
Regards.
2021-05-26 09:24 AM
2021-05-26 09:40 AM
Hi,
maybe try putting
bias-pull-up;
for data lanes too (if not present on your PCB) instead of 'bias-disable;'
Regards.
2021-05-26 09:46 AM
2021-05-26 11:31 PM
AN5031 figure 39 show internal pull-ups, it depend on your design choice, it is either internal or external (sometimes both).
In case of boot from Serial-NAND, BootROM will setup pull-up on IO0 and IO1, but this is later override by DT settings.
I'm not sure it is the root cause (it should work without them), but easy to give it a try.
On our side, MT29F1G01ABAFD12-IT:F has been tested and it work for BootROM without fusing OTP WORD9.
Maybe worth to try with latest Ecosystem v3.0 (recommended for new design).
see also https://wiki.st.com/stm32mpu/wiki/How_to_configure_U-Boot_for_your_board
Maybe provide TSV and complete UART console log during flashing could help too.
2021-05-27 12:44 AM