Memory equalization - How are the traces measured?

[DMårt]

I downloaded the STM32MP151AAC3 example model (.zip file) that routes traces to the DDR3L memory

STM32MP151A - MPU with Arm Cortex-A7 650 MHz, Arm Cortex-M4 real-time coprocessor, TFT display - STMicroelectronics

Then I measured DDR_Q1 to DDR_7, DQM0, DQS0_P and DQS0_N and filled the Excel table that is included inside the downloaded .zip file.

Here is the result:

I have been using Altium CircuitMaker (very similar to Altium Designer).

I measured by first pressing CTRL+H and then mark one part of the track and then I press this button.

But when I look at the Excel spred sheet that ST have made, they show me these numbers.

My question is: What are ST doing to getting the length of DQ0, DQ1, DQ5 and DQ6 ? It seems that they are the only ones that differs. Others seems to be similar. 

If they are changed in the model, but not in the Excel spred sheet, which values should I follow? The values made by ST, or the hard ware example model made by ST?

The reason why I'm asking this question is becuse the minimal clearance in the BGA for the DDR3L tracks, is 0.08mm. I need to re-route some tracks to increase the minimal electrical clearance.

[PatrickF]

HI @DMårt 

I'm not expert, but checking with Altium Designer, I see length in excel is very close to the value from the PCB file. So, no issue there

DQ1 details

Regards.

[DMårt]

@PatrickF 

Thank you!

I have re-routed the upper layer traces and it seems very promising.

But for the lower traces, I have a question about the lengths: Should the lengths of the pull-up traces count with the lenghts of the signal traces?

Or is the only length between MCU pad and DDR pad, including PCB thickness times 2 (it's 2 vias)?

[PatrickF]

Hi @DMårt 

track length put in excel sheet should be calculated from MP1 to DDR (ball to ball), excluding the termination resistor track (which should be as short as possible, no length equalization).

Obviously, termination resistor track should be 'after' the MP1 to DDR track (no 'T' routing which break impedance and signal integrity). What I see above seems not good.

Quick explanation: Lenght equalization is for MP1/DDR timing propagation (i.e. signals must be sampled at right time). Termination resistors are for signal integrity (reflections).

Notice that termination resistors are optional when using a single DDR3L x 16 bits (Although we have it on our reference boards, many customers does not have it without any issues)

Regards.

[DMårt]

>> What I see above seems not good.

It's the reference model from ST 😉

STM32MP151A - MPU with Arm Cortex-A7 650 MHz, Arm Cortex-M4 real-time coprocessor, TFT display - STMicroelectronics

So the impedence should be 55 ohm and still length matching?

OK! STM32MP151 pad to DDR3L pad. Then I need to remove one track of the stub so it does not includes in the length count.

[DMårt]

@PatrickF 

Hi!

I have a question about measurement. Can you check if I have done right? 

If I share my Altium project with you so you can view the length of the DDR conductors and compare it with Altium Designer. I have Altium CircuitMaker. Is that OK?

Because when I measure the initial example from ST, the DDR routings seems not to be correct according to the lengths.

I had to re-route every track of the example from ST.

[PatrickF · Accepted solution]

Hi @DMårt 

that's a question to Altium support I guess.

As you might understand, we did not offer PCB review for community users.

Regards.

[DMårt]

@PatrickF 

I understand.

I just want to tell ST that the initial example has not correct lengths for their DDR routings.

They have inclueded the short stub into the calculations.

[PatrickF]

Hi,

thanks. I could escalate to owner of the excel values in case of error in lengths. I have done quick check on a couple of DQx and Ax tracks and seems ok (folder STM32MP15XXAC_1DDR3L).

Could you elaborate a bit about "They have included the short stub into the calculations." ?

Please provide also example name where you have found issues.

Regards

[DMårt]

@PatrickF 

Hi!

Here is one example from the initial STM32MP15XXAC template:

The DDR_CLK_N have the length: 49.769mm, inclunded the stub.

Add the thickness 49.769mm + 1.6mm * 2 = 52.969 mm.

But when I measure the stub inside the template, it's: 1.6870mm

That means the length of the total signal path is: 52.969mm - 1.6870mm = 51.28200mm

According to the Excel document, the DDR_CLK_N measurement is: 47.03mm (I assume that the board thickness is included and the stub is not included at all)

In other words: Out of range

I had to re-route all tracks so they fit. I did not include the stub, only the board thickness times 2. (2*1.52 mm)

By the way!

The rule of minimal eletrical clearance between track to track is 0.08mm. I would not recommend that. I have re-routed everything so it fits S-3S rule and also have at least 0.1mm in spacning between tracks.