Issues in OPTEE (bootloader)

WSief.1 · ‎2023-06-05

I am trying to boot my STM32MP153C over cubeProgrammer to load data in EMMC0.

Unfortantly the programm is failing in OPTEE Part (Second file to download).

Here is the UART log:

NOTICE: CPU: STM32MP153CAA Rev.Z

NOTICE: Model: STMicroelectronics STM32MP157C-EV1 STM32CubeMX board - openstlinux-5.15-yocto-kirkstone-mp1-v22.11.23

INFO: PMIC version = 0x21

INFO: Reset reason (0x15):

INFO: Power-on Reset (rst_por)

INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000

INFO: FCONF: Reading firmware configuration information for: stm32mp_io

INFO: Using USB

INFO: Instance 2

INFO: Boot used partition fsbl1

NOTICE: BL2: v2.6-stm32mp1-r2.0(debug):()

NOTICE: BL2: Built : 12:50:03, Jun 2 2023

INFO: BL2: Doing platform setup

INFO: RAM: DDR3-DDR3L 32bits 533000kHz

INFO: Memory size = 0x40000000 (1024 MB)

INFO: DFU USB START...

INFO: phase ID :3, Manifestation 3 at c716ebde

INFO: Send detach request

INFO: Receive DFU Detach

INFO: DFU USB STOP...

INFO: BL2: Loading image id 1

INFO: Loading image id=1 at address 0x2ffff000

INFO: Image id=1 loaded: 0x2ffff000 - 0x2ffff1fa

INFO: FCONF: Reading FW_CONFIG firmware configuration file from: 0x2ffff000

INFO: FCONF: Reading firmware configuration information for: dyn_cfg

INFO: FCONF: Reading firmware configuration information for: stm32mp1_firewall

INFO: BL2: Loading image id 4

INFO: Loading image id=4 at address 0x2ffc0000

INFO: Image id=4 loaded: 0x2ffc0000 - 0x2ffc002c

INFO: OPTEE ep=0x2ffc0000

INFO: OPTEE header info:

INFO: magic=0x4554504f

INFO: version=0x2

INFO: arch=0x0

INFO: flags=0x0

INFO: nb_images=0x2

INFO: BL2: Loading image id 8

INFO: Loading image id=8 at address 0x2ffc0000

INFO: Image id=8 loaded: 0x2ffc0000 - 0x2ffda730

INFO: BL2: Loading image id 9

INFO: Loading image id=9 at address 0xfe200000

INFO: Image id=9 loaded: 0xfe200000 - 0xfe253000

INFO: BL2: Loading image id 2

INFO: Loading image id=2 at address 0xc0500000

INFO: Image id=2 loaded: 0xc0500000 - 0xc05142d8

INFO: BL2: Skip loading image id 16

INFO: BL2: Loading image id 5

INFO: Loading image id=5 at address 0xc0100000

INFO: Image id=5 loaded: 0xc0100000 - 0xc01ece88

NOTICE: BL2: Booting BL32

INFO: Entry point address = 0x2ffc0000

INFO: SPSR = 0x1d3

I/TC: Early console on UART#4

I/TC:

I/TC: Pager is enabled. Hashes: 2752 bytes

I/TC: Pager pool size: 60kB

I/TC: Non-secure external DT found

I/TC: WMS: 100 !

I/TC: WMS: 1000 !

E/TC:0 0 Panic 'Failed to add OP-TEE Device Tree node' at core/arch/arm/kernel/boot.c:1140 <update_external_dt>

E/TC:0 0 assertion 'p->pa' failed at core/arch/arm/mm/core_mmu.c:2433 <io_pa_or_va_secure>

E/TC:0 0 Panic at core/kernel/assert.c:28 <_assert_break>

...

E/TC:0 0 Core data-abort at address 0x30045ffc (translation fault)

E/TC:0 0 fsr 0x00000a07 ttbr0 0x2ffe0000 ttbr1 0x00000000 cidr 0x0

E/TC:0 0 cpu #0 cpsr 0x200001f3

E/TC:0 0 r0 0x00000981 r4 0x30046048 r8 0x0000000a r12 0x00000000

E/TC:0 0 r1 0x0000000a r5 0x30046288 r9 0x00000000 sp 0x30046010

E/TC:0 0 r2 0x0000000a r6 0x00000981 r10 0x300460cc lr 0x2ffcd78d

E/TC:0 0 r3 0x00000000 r7 0x00000000 r11 0x00000064 pc 0x2ffcd6da

E/TC:0 0 TEE load address @ 0x2ffc0000

It seems that i have some memory access issues. But its not clear what exactly is missing in device tree file. Device Tree was derived from STM32MP157-EV1 board and adapted to 157C environment.

STM32 guides are checked
I also tried to insert the nodes firmeware and optee in the device tree but the message E/TC:0 0 Panic 'Failed to add OP-TEE Device Tree node' at core/arch/arm/kernel/boot.c:1140 <update_external_dt> is still available. In code it looks like that software would add this node if needed. I assume i have some memory access isssues which are not handled by device tree node.

Any advices would help. Best Reagrds

Macdog · ‎2023-06-08

@WSief.1 , did you figure this out? The firmware and optee nodes are part of the uboot.dtb device tree that is a component of the fip.bin file. They are defined in u-boot/arch/arm/dts/stm32mp151.dtsi. I'd check the uboot and fip build process. Hope this helps.

Also in my very limited experience with OP-TEE, almost every problem shows up as a "Core data-abort".

WSief.1 · ‎2023-06-12

I made a test to perform write access while i am in the OPTEE code. Read operations are ok. (tried on Address 0x2FFC0000, SYSRAM test with writing back of the old data) But write operations are leading to the same error as mentioned before. The question is here, are there possibilites to setup the firewall in the way that SYSRAM writes are also possible ?

PatrickD · ‎2023-06-20

Hi

in the trace

INFO: Loading image id=9 at address 0xfe200000 => OP-TEE image loaded at the end of the DDR

INFO: Loading image id=2 at address 0xc0500000 => U-Boot device tree

INFO: Loading image id=5 at address 0xc0100000 => U-Boot binary

in OP-TEE the DDR firewall is configured in core/arch/arm/plat-stm32mp1/plat_tzc400.c
For other memory it is done in etzpc driver.

But I think this data abort is just a side effect of the first error (bad management of panic)

E/TC:0 0 Panic 'Failed to add OP-TEE Device Tree node' at core/arch/arm/kernel/boot.c:1140 <update_external_dt>

=> you need to dig why this function failed with panic,
with panic the OP-TEE statup sequence is interrupted and some debug informatio is displayed....
but in you case this trace cause the crash (because the mmu is not configured yet for RAM at 0x3000000)

E/TC:0 0 Core data-abort at address 0x30045ffc (translation fault)

So why add_optee_dt_node() return a error ?

I think something is miss-aligned between the OP-TEE and U-Boot device tree.

Normally "/firmware/optee" should be present in the U-Boot and Linux device tree, and all the DT uàpdate is skipped

Can you verify this point, do you have the optee node in your U-Boot device tree,
it is defined in arch/arm/dts/stm32mp151.dtsi

firmware {
optee {
method = "smc";
compatible = "linaro,optee-tz";
};

https://wiki.st.com/stm32mpu/wiki/How_to_debug_OP-TEE

Patrick