2023-03-02 07:53 AM
STM32MP135 is connect on i2c bus to 3 devices:
I am using linux kernel 5.15.24 synched with your github repo. LM75 and PCF8563 are working fine. INA233 has problems to manage the PEC (Packet Error Correction)
I am seeing lot of this errors:
stm32f7-i2c 40012000.i2c: Bad PEC 0x89 vs. 0x79
stm32f7-i2c 40012000.i2c: Bad PEC 0x89 vs. 0xc7
stm32f7-i2c 40012000.i2c: Bad PEC 0x89 vs. 0xed
I checked on the st driver that the PECEN is flagged since the i2c slave device has the PEC capability, and I am receving the PEC fo=rom the device in the log: 0x79, 0xcf, 0xed.
The strange think is that the register value read from stm device is always 0x89.
This value is read using the
internal_pec = readl_relaxed(i2c_dev->base + STM32F7_I2C_PECR)
It seems the register is not properly updated.
Any idea or suggestion?
2023-09-28 07:38 AM
Could you please test this patch ? (it is based on kernel 6.10)
--- drivers/i2c/busses/i2c-stm32f7.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c index 97f7aced4f07..ff33a5e3e6e7 100644 --- a/drivers/i2c/busses/i2c-stm32f7.c +++ b/drivers/i2c/busses/i2c-stm32f7.c @@ -1071,9 +1071,10 @@ static int stm32f7_i2c_smbus_xfer_msg(struct stm32f7_i2c_dev *i2c_dev, /* Configure PEC */ if ((flags & I2C_CLIENT_PEC) && f7_msg->size != I2C_SMBUS_QUICK) { cr1 |= STM32F7_I2C_CR1_PECEN; - cr2 |= STM32F7_I2C_CR2_PECBYTE; - if (!f7_msg->read_write) + if (!f7_msg->read_write) { + cr2 |= STM32F7_I2C_CR2_PECBYTE; f7_msg->count++; + } } else { cr1 &= ~STM32F7_I2C_CR1_PECEN; cr2 &= ~STM32F7_I2C_CR2_PECBYTE; @@ -1161,8 +1162,10 @@ static void stm32f7_i2c_smbus_rep_start(struct stm32f7_i2c_dev *i2c_dev) f7_msg->stop = true; /* Add one byte for PEC if needed */ - if (cr1 & STM32F7_I2C_CR1_PECEN) + if (cr1 & STM32F7_I2C_CR1_PECEN) { + cr2 |= STM32F7_I2C_CR2_PECBYTE; f7_msg->count++; + } /* Set number of bytes to be transferred */ cr2 &= ~(STM32F7_I2C_CR2_NBYTES_MASK); -- 2.25.1