EQOS_DMA_MODE_SWR stuck on U-BOOT-STM32MP 2021
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‎2023-03-13 9:30 AM
I am facing this error when I update to Kirkstone, while this error does not exist on Dunfell.
I get this error after I set my ethraddr manually.
ðernet0 {
compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
reg = <0x5800a000 0x2000>;
reg-names = "stmmaceth";
interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
<&exti 70 1>;
interrupt-names = "macirq",
"eth_wake_irq",
"stm32_pwr_wakeup";
clock-names = "stmmaceth",
"eth-ck",
"mac-clk-tx",
"mac-clk-rx",
"ethstp";
clocks = <&rcc ETHMAC>,
<&rcc ETHCK_K>,
<&rcc ETHTX>,
<&rcc ETHRX>,
<&rcc ETHSTP>;
st,syscon = <&syscfg 0x4>;
snps,mixed-burst;
snps,pbl = <2>;
snps,en-tx-lpi-clockgating;
/* In case of U-Boot echo system release v3.1.0 */
st,eth-ref-clk-sel;
snps,axi-config = <&stmmac_axi_config_0>;
snps,tso;
power-domains = <&pd_core>;
status = "okay";
};
ðernet0{
pinctrl-names = "default", "sleep";
pinctrl-0 = <ð1_pins_mx>;
pinctrl-1 = <ð1_sleep_pins_mx>;
status = "okay";
/* USER CODE BEGIN ethernet0 */
phy-mode = "rmii";
max-speed = <100>;
phy-handle = <&phy0>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
/* USER CODE END ethernet0 */
};
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2 REPLIES 2
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‎2023-03-13 9:36 AM
Hi @ZUl A.1​ ,
Can you please elaborate with exact version reference + logs + some context information that could help to analyze the problem ( eg board, SoC reference, trusted or OP-TEE etc ... )
Thanks
Olivier
Olivier GALLIEN
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‎2024-05-16 7:18 AM
Hi,
were you able to solve this? I have the same error right now.
