I'm shopping for MCU / MPU hybrid processors like the STM32MP1, targeting applications that need Ethernet connectivity to both the MCU and the MPU. Simultaneous connectivity would be easiest to plan for, but selectable connectivity might also work.
I would like to understand the topology of the Ethernet connection within the STM32MP1 among the Cortex-M and Cortex-A. I've scoured all of the STM32MP1 documentation and can find information only about the Ethernet component itself, and nothing on how it can be assigned or shared among the integral Cortex-M and Cortex-As.
The STM32MP1 product introduction states that "most peripherals can be allocated to either the Cortex-A7 or Cortex-M4 cores". If this applies to the Ethernet MAC, does that mean that it can be allocated to only one of these at a time, not both? Can the allocation be changed on a running system, and does this require a reboot? Where is the mechanism for allocation documented?
If the Ethernet interface is allocated to the Cortex-M, is there a supported method that makes it available to the Cortex-As via an internal interface with the Cortex-M? Is this integrated within the ST software tooling?
Or, is there an integral Ethernet switch, like on the Texas Instruments AM335x family?
Thanks!
Jeffrey
