UBoot SPL DDR Testing on STM32MP157FAD1 error stm32mp1_clk_get_id: clk id 142 not found

[TStru.1]

I am building uboot spl for DDR testing of a custom board based on the STM32MP157FAD1 MPU. The design uses I2C6 to communicate with the PMIC. The following error occurs: "stm32mp1_clk_get_id: clk id 142 not found". Any suggestions on why the I2C6 clock is "not found" would be appreciated.

I2C4/6 are configured for HSI.

Full console output:

U-Boot SPL 2020.01-stm32mp-r2 (Jan 07 2021 - 16:14:48 -0500)

Model: STMicroelectronics custom STM32CubeMX board

stm32mp1_clk_get_id: clk id 142 not found

board_init_f: probe failed clk=0 reset=0 pinctrl=0 power=-22

RAM: DDR3-DDR3L 16bits 533000Khz

stm32mp1_clk_get_id: clk id 142 not found

0:DDR_RESET

DDR>

[Olivier GALLIEN]

Hi @TStru.1​ ,

Which OpenSTLinux version are you using ?

You're problem looks like know issue in TF-A in v2.2-stm32mp-r1.2 ( Openstlinux-5.4-dunfell-mp1-20-06-24 )

Please check out : https://community.st.com/s/question/0D53W00000JQ4z4SAD/stm32mp1-ecosystem-known-bugs-and-common-pitfalls

Olivier

[Olivier GALLIEN]

Since you're using Uboot SPL TF-A not involved but I guess this should give you some hint to investigate what maybe wrong.

Olivier

[TStru.1]

Hi Oliver,

I am using stm32mp1-openstlinux-5-4-dunfell-mp1-20-11-12. The TF-A build is working with I2C6. The issue seems to be specific to u-boot SPL. I did see the following comment on the release notes https://wiki.st.com/stm32mpu/wiki/STM32MP15_ecosystem_release_note.

"Basic boot has been removed since STM32MP15-ecosystem-v2.0.0, if you were using basic boot with U-BOOT-SPL to load U-BOOT and the Kernel, then you need to use now the ST reference boot scheme in replacing U-BOOT-SPL by TF-A as FSBL"

Does this mean u-boot SPL for DDR Interactive Mode is not suported in v2.0?

Thanks

[Olivier GALLIEN]

Hi @TStru.1​ ,

Basic boot is still supported in V2.0.0 only for DDR Interactive Mode.

Since you use I2C6 instead of I2C4 maybe you miss something in DT.

Please cross check, particularly clock state

Olivier

[TStru.1]

Hi Oliver,

Thanks for the continued support. Unfortunately we are still having the same issue after reviewing the device tree numerous times and following the Lab-BringUpFromPartNumber-V2.pdf referenced in https://community.st.com/s/article/FAQ-STM32MP1-Bring-up-procedure. I've attached our u-boot dts and dtsi files. Maybe you can point out what we're missing.

Tim

[PatrickD · Accepted solution]

Hi,

The message "stm32mp1_clk_get_id: clk id 142 not found" comes from the U-boot clock driver in 'drivers/clk/clk_stm32mp1.c'

It indicates that clock id for I2C6 is not supported :

include/dt-bindings/clock/stm32mp1-clks.h:153:#define I2C6_K 142

Today this STM32MP15x RCC driver only support the required clock for SPL / U-Boot (to avoid to increase the SPL size if we support all the clock defined in this binding)

So I can confirm that I2C6 clock in no (yet!) supported, the supported I2C clocks are:

drivers/clk/clk_stm32mp1.c::

....

static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = {

....

STM32MP1_CLK_SET_CLR(RCC_MP_APB1ENSETR, 21, I2C1_K, _I2C12_SEL),

STM32MP1_CLK_SET_CLR(RCC_MP_APB1ENSETR, 22, I2C2_K, _I2C12_SEL),

STM32MP1_CLK_SET_CLR(RCC_MP_APB1ENSETR, 23, I2C3_K, _I2C35_SEL),

STM32MP1_CLK_SET_CLR(RCC_MP_APB1ENSETR, 24, I2C5_K, _I2C35_SEL),

....

STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 2, I2C4_K, _I2C46_SEL),

...

};

today I don't known why I2C6 is not supported...

I will add it

but you can patch the U-Boot driver code to handle this I2C6_K with the line:

STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 2, I2C4_K, _I2C46_SEL),

+ STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 3, I2C6_K, _I2C46_SEL),

STM32MP1_CLK_SET_CLR(RCC_MP_APB5ENSETR, 8, RTCAPB, _PCLK5),

FYI: I don't test it yet.

Patrick

[PatrickD]

http://patchwork.ozlabs.org/project/uboot/patch/20210122153414.1.I28be53e4ce2082b513afd19d77d1430741ac16f3@changeid/

[TStru.1]

Hi Patrick,

That worked perfectly. Thanks for your assistance!